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Abstract

System validation involves assuring that a system satisfies its design specifications and operates to the satisfaction of its users. Validation activity is important during all design phases and may include testing of the final system implementation, simulation studies, analytical performance predictions, and verification. Verification is essentially a demonstration that a system meets its specifications. In software engineering, the aim of verification is “the establishment of the truth of the correspondence between a software product and its specification” (Boehm, 1979). It is also “the demonstration of correctness, completeness and consistency of the software at each stage of the development life cycle” (Adrion et al., 1982).

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Lai, R., Jirachiefpattana, A. (1998). Protocol Verification. In: Communication Protocol Specification and Verification. The Springer International Series in Engineering and Computer Science, vol 464. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-5549-0_6

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  • DOI: https://doi.org/10.1007/978-1-4615-5549-0_6

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