Abstract
In cyber-physical systems (CPS), physical behaviors are typically controlled by digital hardware. As a consequence, continuous behaviors are discretized by sampling and quantization prior to their processing. Quantifying the similarity between CPS behaviors and their specification is an important ingredient in evaluating correctness and quality of such systems. We propose a novel procedure for measuring robustness between digitized CPS signals and Signal Temporal Logic (STL) specifications. We first equip STL with quantitative semantics based on the weighted edit distance (WED), a metric that quantifies both space and time mismatches between digitized CPS behaviors. We then develop a dynamic programming algorithm for computing the robustness degree between digitized signals and STL specifications. We implemented our approach and evaluated it on an automotive case study.
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Notes
- 1.
We use s(t) to denote the valuation vector of the variables in X at time t.
- 2.
Although this segment of \(\textsc {STL}\) is expressively equivalent to \(\textsc {LTL}\), use the \(\textsc {STL}\) name to highlight the explicit notions of real-time and quantitative values in the language.
- 3.
The time in \(\mathcal {A}_{\upvarphi }\) cannot be treated symbolically with digital clocks since every pair of states and clock valuation may behave differently with respect to the WED.
- 4.
Since s has only one component, we skip the variable name.
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Acknowledgements
We would like to thank Oded Maler, Mario Klima and the anonymous reviewers for their comments on the earlier drafts of the paper.
We acknowledge the support of the IKT der Zukunft of Austrian FFG project HARMONIA (nr. 845631), the ICT COST Action IC1402 Runtime Verification beyond Monitoring (ARVI), the Austrian National Research Network S 11405-N23 and S 11412-N23 (RiSE/SHiNE) of the Austrian Science Fund (FWF) and the Doctoral Program Logical Methods in Computer Science of the Austrian Science Fund (FWF).
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Jakšić, S., Bartocci, E., Grosu, R., Ničković, D. (2016). Quantitative Monitoring of STL with Edit Distance. In: Falcone, Y., Sánchez, C. (eds) Runtime Verification. RV 2016. Lecture Notes in Computer Science(), vol 10012. Springer, Cham. https://doi.org/10.1007/978-3-319-46982-9_13
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DOI: https://doi.org/10.1007/978-3-319-46982-9_13
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