Cross‐Sectional Carrier Lifetime Profiling and Deep Level Monitoring in Silicon Carbide Films Exhibiting Variable Carbon Vacancy Concentrations

The carrier lifetime control over 150 μm thick 4H‐SiC epitaxial layers via thermal generation and annihilation of carbon vacancy (VC) related Z1/2 lifetime killer sites is reported. The defect developments upon typical SiC processing steps, such as high‐ and moderate‐temperature anneals in the presence of a carbon cap, are monitored by combining electrical characterization techniques capable of VC depth‐profiling, capacitance–voltage (CV) and deep‐level transient spectroscopy (DLTS), with a novel all‐optical approach of cross‐sectional carrier lifetime profiling across 4H‐SiC epilayer/substrate based on imaging time‐resolved photoluminescence (TRPL) spectroscopy in orthogonal pump‐probe geometry, which readily exposes in‐depth efficacy of defect reduction and surface recombination effects. The lifetime control is realized by initial high‐temperature treatment (1800 °C) to increase VC concentration to ≈1013 cm−3 level followed by a moderate‐temperature (1500 °C) post‐annealing of variable duration under C‐rich thermodynamic equilibrium conditions. The post‐annealing carried out for 5 h in effect eliminates VC throughout the entire ultra‐thick epilayer. The reduction of VC‐related Z1/2 sites is proven by a significant lifetime increase from 0.8 to 2.5 μs. The upper limit of lifetimes in terms of carrier surface leakage and the presence of other nonradiative recombination centers besides Z1/2, possibly related to residual impurities such as boron are discussed.


Introduction
Silicon carbide (SiC) is a wide bandgap semiconductor with material properties allowing for electronic applications operating under harsh conditions, such as high temperature and radiation. activity as a double acceptor (V C (2À/0)) positioned 0.7 eV below the conduction band edge (E C ) and referred to in the literature as Z 1/2 level, and also as a single and double donor (V C (0/þ/2þ)) at E C -(1.5-1.6) eV known as EH 6,7 level. [2] The typical concentration [V C ] in the present-day 4H-SiC epilayers remains in the range of 5 Â 10 12 cm À3 thus limiting carrier lifetimes in excess of %5 μs. Extensive efforts are made to reduce the [V C ] by post-growth processing, in particular by injecting highly-mobile carbon interstitials (C i ) from the surface into the bulk of the epilayer to recombine with V C [3][4][5][6] and reach the targeted levels of [V C ] < 10 11 cm À3 . Despite the convincing demonstrations of the [V C ] control, there remain several important aspects that need clarification. First, the literature reports validating [V C ] contents typically employ capacitance spectroscopy on Schottky barrier diodes (SBD) formed on the tested material disregarding the important consequences of the hightemperature processing step inevitable in the p-n diode manufacturing; e.g., %1800°C anneals are necessary to activate p-type dopants introduced by ion-implantation. For the bipolar applications, mastering the initial [V C ] <10 11 cm À3 levels seems impractical since the imminent 1800°C anneals might be sufficient to re-generate V C defects in view of their relatively low formation energy of %4.8 eV. [7,8] Apparently, the V C defect elimination should rather follow after p-n junction formation as a final processing step, and testing of such C i -injection strategy constitutes one of the key objectives in the present work. Yet another aspect calling for clarification relates to the fact that until now the reports on V C contents with relation to carrier lifetimes involve relatively thin epilayers without clear discrimination of the surface effects. Indeed, besides recombination via Z 1/2 centers that delimit so-called bulk lifetime, there is also an inherent constraint to carrier lifetimes due to the finite thickness of epilayers, implying that sufficiently thick layers with respect to carrier diffusion length (d EPI > L D ) are vital for minimizing the detrimental effects of carrier recombination at the surface and interface with the substrate. [9] It should be mentioned in this regard that carrier lifetime control in such optically thick epilayers has already gained considerable attention worldwide. [10][11][12][13][14][15][16][17][18] Accordingly, the material of choice for the thermal generation and C-injection experiments should preferably involve ultra-thick and low-doped epilayers to ensure a broader profiling range and depth discrimination.
In the present work, the aforementioned issues are tackled by demonstrating a viable lifetime control through 150 μm-thick 4H-SiC epitaxial layers validated by combining electrical V Cprofiling methods with a novel all-optical approach for profiling carrier lifetimes across the epitaxial layer, which allows for depth-resolved monitoring of defect reduction efficiency as well as surface recombination effects.

Results and Discussion
The present work focuses on the lifetime control over ultrathick (150 μm) 4H-SiC epitaxial layers via thermal generation and annealing of V C -related Z 1/2 recombination sites limiting bulk carrier lifetime. The article is arranged as follows: first, we introduce an all-optical approach of depth-resolved lifetime measurements across 4H-SiC epilayers/substrate based on imaging time-resolved photoluminescence (TRPL) spectroscopy in orthogonal pump-probe geometry (ortho-TRPL). Next, the defect developments are discussed by combining optical results on cross-sectional carrier lifetime profiling with an electrical characterization of V C depth profiles by capacitance-voltage (CV) and deep-level transient spectroscopy (DLTS).

Cross-Sectional Carrier Lifetime Profiling by Ortho-TRPL Spectroscopy
TRPL is a common technique for studying recombination processes in 4H-SiC, [19] which is typically operated in backscattering optical configuration with PL emission being collected from the same side and surface spot as laser excitation. It is important to note that such TRPL measurements provide an integrated carrier lifetime across the probed epilayer thickness and possibly also involve substrate. The latter contribution can be minimized by adjusting the excitation wavelength to match penetration with epilayer thickness, however, the steep gradient of the photogenerated carriers and their initial localization close to the surface in turn actuate the processes of diffusion and surface recombination. As a result, TRPL decay generally represents carrier transport dynamics rather than minority carrier lifetime, which is a fundamental material property. All this clearly emphasizes the importance of a method capable of discriminating carrier transport constituents, diffusion and recombination, by providing depth-resolved lifetime distribution across the epilayer. To date, such insights can be attained by the transient free-carrier absorption (FCA) technique in a perpendicular pump-probe beam configuration, a challenging method requiring precision alignment of the two focused laser beams and specially prepared stripe-shaped specimens. [20] In the present work, a novel approach in depth-resolved carrier lifetime profiling across the epilayer/substrate is realized by employing imaging TRPL spectroscopy in orthogonal pump-probe geometry (ortho-TRPL), which outperforms the FCA technique in terms of spatial resolution and simplicity of operation owing to a single-beam concept and no need for specially prepared samples. An important prerequisite for depth-resolved lifetime profiling is initially flat carrier distribution across the epilayer to suppress the carrier diffusion process at the outset. To this end, a uniform photogeneration of the electron-hole pairs throughout the epilayer is ensured by 372 nm excitation (penetration depth α À1 ≥ 400 μm) impinging normally onto the epilayer surface. The PL emission is collected from the cross-sectional plane orthogonal to excitation by means of a microscope coupled to an imaging spectrograph equipped with EMCCD for microimaging and spectral analysis along with a fast PMT detector for recording spectrally filtered PL transients.
The effective lifetime parameters were deduced from the decay transients of the band-edge emission (spectrally filtered PL region around 390 nm) from the selected regions of interest (ROI) on the cross-sectional plane. The width of ROI is set by adjusting the entrance slit of the spectrograph. Figure 1 presents the conceptual sketch of the novel approach in depth-resolved carrier lifetime measurements across 4H-SiC epilayer/substrate www.advancedsciencenews.com www.pss-a.com structures. The TRPL signal was collected from %10 μm wide ROI while probing several representative positions across the exposed epilayer/substrate cross-sectional plane, i.e., 1) subsurface, 2,3,4) epilayer, and 5) interface regions as well as 6) substrate, as indicated by vertical bars on the cross-section micrographs in Figure 1.
The typical depth-resolved TRPL transients obtained in asgrown material are presented in Figure 2. It should be pointed out that in our experiments the estimated peak photogenerated carrier density of <10 14 cm À3 is below the background doping implying low-level injection conditions; thus TRPL measurements presented herein yield the minority carrier lifetimes. [21] There is a clear correlation between the estimated carrier lifetimes with the probe position, exhibiting the maximal lifetimes of %2.5 μs in the middle of the epilayer and the lowest value of %1 μs in the vicinity of the surface, which is symptomatic of a significant surface recombination effect. This is not surprising considering the visually noticeable surface roughening of the samples subjected to high-temperature treatment. Interestingly, in stark contrast to strong surface recombination, there is virtually no carrier leakage at the interface. Indeed, the estimated lifetime (%2.3 μs) in the proximity of the interface (ROI positions 4,5 in Figure 1) is comparable to that in the mid-epilayer (%2.5 μs) in spite of the very fast recombination processes in the adjacent heavily-doped substrate (%100 ns). Such a subdued leakage is attributable to the confinement of minority carriers (holes) in the epilayer by the low-high (nÀ/nþ) doping-related potential barrier at the epilayer/ substrate boundary.  www.advancedsciencenews.com www.pss-a.com Figure 3 presents numerically simulated dependencies of the effective carrier lifetime versus epilayer thickness assuming the bulk minority carrier lifetime value of 10 μs. The general relationship [22] for surface recombination time (τ surf ) presented in the legend in Figure 3 considers two surfaces of d-thick epilayer with the parameters S 1 and S 2 describing surface and interface recombination velocities, S stands for an average value of both; whereas β parameter (1 ≤ β ≤ 2) differentiates the specific cases of large S with equal versus non-equal S 1 and S 2 .
It is important to point out that even for an ultra-thick 150 μm epilayer the upper limit for the measured effective lifetime is apparently set by carrier diffusion and surface recombination, i.e., it still remains epilayer-thickness dependent. This fact underscores the extreme importance of surface passivation for applications requiring long lifetimes past 10 μs.
The extracted carrier lifetimes as a function of in-depth probe position are summarized in Figure 4 representing cross-sectional carrier lifetime profiles for different thermal treatment and processing conditions. More specifically, the verification of the lifetime control by high-temperature C-cap annealings is presented in Figure 4a, which reveals the extent of lifetime variation achievable by C-cap annealings. One can observe considerable quenching of the lifetime after 1800°C anneal as compared to that of the as-grown material. The lifetime gradually recovers with the increasing time of 1500°C post-annealings, reaching 60% of that in as-grown epilayer after 300 min anneal.
Such a partial recovery could be associated with insufficient annealing time and also with the fact that other defects are being generated due to the presence of excess carbon that acts as recombination centers.
Importantly, for both the lifetime reduction after Vc generation at 1800C and for the subsequent lifetime increase after the 300 min anneals at 1500C, the change is approximately uniform throughout the entire probed region. In other words, the treatment seems to affect the entire epilayer. That this is the case for the Vc generation at 1800C is obvious, but the consistent increase in lifetime after the 1500C anneal for 300 min is interesting, and evidences that the C atoms injected from the C-cap are able to penetrate the entire epilayer to annihilate with V C . It is noteworthy in this regard that interstitial-related defects are being extensively studied, [23] and there are also indications [24] that Z 1/2 deep traps observed in DLTS are actually related to complex defects involving carbon interstitials. Such defect complexes are considered potential sources of internal stress and, if grown sufficiently large to nucleate dislocation loops, could adversely affect the carrier lifetime. This model, however, is challenged by the reported comparative study on the carbon vacancy density (EPR) and the Z 1/2 center density (DLTS) measured on the same sample sets. [25] Furthermore, besides the formation of defect levels that are likely related to carbon interstitials, the C i injection process reportedly has a drastic impact on the B impurity-related levels, [26] which have been linked to the carrier lifetime in SiC. [27]   www.advancedsciencenews.com www.pss-a.com Figure 4b summarizes the effects of the dedicated excess carbon injection test by C-cap annealing at 1250°C for 6.6 h. The outcome of carbon injection is a noticeable increase in the carrier lifetime for the top 80 μm as compared to as-grown material, which is most likely caused by carbon interstitial annihilation with the preexisting V C defects in as-grown material. Here, it is interesting to note that the effect is only observed in the top %80 μm of the epilayer, indicating that the injected C interstitials are only penetrating the upper region of the material. Figure 5 summarizes deep-level monitoring and depth-profiling by CV and DLTS before and after annealing at 1800C to generate carbon vacancies. The free carrier profiles measured by CV at room temperature in as-grown and C-cap annealed at 1800°C epilayers are shown in Figure 5a. DLTS depth profile of the EH 6,7 level representing the V C -related single-and double donor state (V C (0/þ/2þ)) at E C -1.5 eV along with the free carrier profile measured at 650 K in C-cap annealed at 1800C epilayer are plotted alongside for comparison in Figure 5b.

Deep-Level Monitoring and Depth-Profiling by Capacitance Spectroscopy
The CV and DLTS depth-profiling provided thoughtprovoking results. Indeed, one can see in Figure 5b an increase in free carrier density after the 1800C anneal, slightly higher than that of the as-grown sample shown in Figure 5a, with the carrier density [n] increasing toward the bulk of the epilayer. One can observe a corresponding increase in carbon vacancy concentration [V C ] following the same trend as the carrier density toward the bulk of the epilayer. The as-grown material showed a low and constant [V C ] density of %2 Â 10 11 cm À3 . Bearing in mind that EH 6/7 is a donor defect, it can contribute free carriers at high temperatures (T > 600 K), which explains why in Figure 5b a higher charge carrier density is observed at 650 K for 1800°C annealed epilayer than that in Figure 5a measured for the same epilayer at room temperature.
Interestingly, both the [n] and [V C ] increase toward the sample bulk. This is because two mechanisms are competing during the 1800C anneal. Figure 5b presents data for the 1800C annealed sample that reflect the two concurrent processes: generation of V C due to temperature, and simultaneously, annihilation of V C due to recombination with C interstitials.
Considering these arguments we can conclude that neither Frenkel nor Schottky mechanisms acted as the source of carbon interstitials, but rather the carbon cap on the surface served as a source of carbon interstitials (C i ) diffusing into the bulk and leading to the annihilation of V C (V C þ C i ). In contrast to an unvarying free carrier concentration of 2 Â 10 14 cm À3 across the as-grown epilayer, a significant degree of compensation after C-cap annealing at 1800C is exposed by CV measurements at room temperature. The free carrier density appears fully compensated starting from the surface all the way to the depth of %60 μm (Figure 5a) suggesting that some sort of electron traps with a density over 2 Â 10 14 cm À3 are generated near the surface region by annealing at 1800°C with a carbon cap. The V C density is increased towards the bulk of the epi-layer after annealing at 1800°C, as compared to the [V C ] of 2 Â 10 11 cm À3 in the as-grown epi-layer, due to the thermal generation of carbon vacancies at high temperatures. The impact of a second annealing step at a moderate temperature of 1500°C for different durations is shown in Table 1, which summarizes the different processing steps and resulting maximum [V C ] as measured by DLTS for the Z 1/2 or EH 6/7 levels depending on the degree of sample compensation necessitating high-temperature measurement. While the [V C ] concentration is enhanced by %2 orders of magnitude after the 1800°C anneal, a substantial reduction is observed after the 1500°C heat treatments. The 90 min 1500°C anneal yields a lowered [V C ] of 4 Â 10 12 , and the 300 min 1500°C anneal results in [V C ] below the detection limit of the DLTS which is around 10 10 -10 11 cm À3 . The same effect is observed upon the 1250°C anneal with C-cap on as-grown material. In conclusion, the moderate temperature anneals are capable of reducing the [V C ] below the upper limit for highlifetime material by the annihilation of the carbon vacancies via reactions with interstitial C injected from the carbon cap on the epi-layer surface. It is important to note that the DLTS measurements discussed earlier are only probing the upper subsurface regions of the epilayer, e.g., down to %6 μm-depth as Figure 5. Deep-level monitoring and depth-profiling by capacitance-voltage (CV) and deep-level transient spectroscopy (DLTS). a) Free carrier profiles measured by CV at room temperature in as-grown and C-cap annealed at 1800°C epilayers. b) DLTS depth profile of the EH 6,7 level representing the V Crelated single-and double donor state (V C (0/þ/2þ)) at E C -1.5 eV along with the free carrier profile measured at 650 K in C-cap annealed at 1800°C epilayer.
www.advancedsciencenews.com www.pss-a.com shown in Figure 5b. Therefore, it is challenging from the DLTS data alone to assess whether the lifetime enhancing treatment impacts the entire epi thickness. However, this is in fact evident from the lifetime data shown in Figure 4a. After the 300 min anneal at 1500°C, the carrier lifetime enhancement is uniform across the entire probed region. Evidently, the injected C interstitials from the C-cap penetrate and interact with V C throughout the probed depth. In contrast, a 1250°C anneal would not provide the interstitial C with sufficient energy to permeate the epilayer, as evidenced by the lifetime enhancement in Figure 5b only in the upper %80 μm of the epilayer.
In the case of carbon implantation or thermal oxidation, electron traps originating from defect complex including carbon interstitial are generated near the surface (e.g., ON1, ON2, M centers [3,28,29] ), and a similar type of defect complex cannot be excluded in the present experiment. An insight into the origin of such compensation was attained by DLTS depth-profiling, which validated that the Z 1/2 (0/2À) acceptor charge transition level of the carbon vacancy defect is responsible for compensating the charge carriers. Such association is further supported by the observed DLTS and conductance measurements (not shown) of full recovery of the free charge carriers upon increasing the temperature above 370 K at which carbon vacancy becomes neutral, thus confirming its role in the compensation process. Generally, the DLTS depth-profile developments infer that carbon injection in the case of the near absence of V C leads to the formation of new defect levels related to excess of carbon supporting similar assumptions discussed in the optical section. To sum up, the electrical measurements highlight the complexity of the V C annihilation process by the supply of excess carbon, the incorporation of which apparently occurs via multiple pathways that lead both to the annihilation of V C and the formation of new defects.

Conclusion
By forming a carbon-rich cap on the surface of 4H-SiC epilayers, we have injected excess carbon by thermal annealing. The crosssectional profiling of lifetimes suggests that post-annealing under C-rich thermodynamic equilibrium conditions reduces V C throughout the entire 150 μm thick epilayer, thus attesting as a potent lifetime control method suitable for 4H-SiC epilayers of all practicable thicknesses to date. The upper limit of carrier lifetimes is determined by carrier diffusion and surface recombination as well as the presence of other nonradiative recombination centers besides Z 1/2 , conceivably involving residual impurities, such as boron. The cross-sectional lifetime profiling also underscores the importance of surface passivation for applications requiring the longest possible lifetimes. Generally, the combined optical and electrical profiling results point out the complexity of the V C annihilation process via the supply of excess carbon, which involves a variety of channels leading both to the annihilation of V C and the formation of new defects.

Experimental Section
The starting material was low-doped (2 Â 10 14 cm À3 ) 150 μm thick epitaxial layer (Ascatron AB, Sweden) grown on heavily-doped (8 Â 10 18 cm À3 ) n-type 4H-SiC substrate. Next, a high-temperature treatment (1800°C) was employed to increase V C concentration to %10 13 cm À3 level, and then a moderate-temperature (1500°C) post-annealing of variable duration was performed under C-rich thermodynamic equilibrium conditions to study defect evolutions. Throughout the high-temperature treatments, the surface of the epilayers was protected by a pyrolyzed photoresist film, a so-called carbon cap (C-cap), [6] which also acted as a source for carbon in-diffusion ensuring C-rich conditions. For studies of carbon interstitial injection, the annealing was performed at 1250°C for 6.6 h. The C-cap was removed after high-temperature anneals by dry thermal oxidation performed at 900°C. The thermal processing steps and sample notation used in the manuscript are outlined in Table 1.
The electrical characterization by CV profiling was carried out using a high-precision capacitance meter (Boonton, Model 7200) operating at 1 MHz frequency. The same capacitance meter coupled with a pulse generator (Agilent, 81110 A) provided means for DLTS measurements of V C concentration via the related Z 1/2 peak ascribed to the double negative acceptor state, V C (2À/0), located in DLTS spectra at 285 K for a rate window of (640 ms) À1 , and the EH6/7 peak assigned to V C (2þ/þ/0) located at %600 K. For electrical measurements, Schottky barrier diodes were formed by depositing Ni contacts of 1 mm diameter on the epilayer surface using an electron beam evaporator and creating Ohmic contact on the backside (substrate) by silver paste.
TRPL measurements were performed at room temperature using 372 nm wavelength excitation of a 50-ps pulsed laser (PicoQuant, average power 2 mW @40 MHz). The emission was collected from the orthogonal to the excitation plane and analyzed by an imaging spectroscopy system comprised of a microscope (50X objective, Mitutoyo) coupled to an imaging spectrograph (HORIBA Jobin Yvon, iHR320) equipped with EMCCD camera (Andor, iXon888) and fast PMT detector (Becker&Hickl, PMC100) linked to photon counters (PicoQuant, TCSPC TimeHarp200, and MCS NanoHarp250). The spatial resolution was determined by the microscope magnification and the width of the ROI set by adjusting the entrance slits of the imaging spectrograph. In this work, the TRPL signal was collected Table 1. Overview of the thermal processing steps and resulting carbon vacancy concentrations [V C ] extracted from DLTS measurements of either Z 1/2 or EH 6/7 levels depending on the degree of compensation in the sample. Post-ANN1500C 300 min 1800C, 40 min 1500C, 300 min V C annihilation <<2 Â 10 11 below DLTS detection limit ANN1250C 6.6 h 1250C, 396 min None C injection for V C annihilation <<2 Â 10 11 below DLTS detection limit www.advancedsciencenews.com www.pss-a.com from %10 μm wide ROI. The time resolution of the TRPL system was around 50 ps, which is achievable in time-correlated single photon counting (TCSPC) mode upon deconvolution of the system response function. This high resolution is relevant for measuring fast PL decay transients typical to SiC substrate material (nanosecond time domain). For the high-crystallinity epilayers demonstrating minority carrier lifetimes in the microsecond range, the TRPL system is operated in multichannel scaling (MCS) photon counting mode offering %4 ns resolution.