Innovations in thin‐film electronics for the new generation of displays

Today's display industry faces transistor‐level challenges similar to those of complementary metal‐oxide semiconductor (CMOS) metal‐oxide semiconductor field‐effect transistors (MOSFETs) in the mid‐1990s. Learnings from MOSFETs inform the display industry's response to the limitations of silicon‐based thin‐film transistors (TFTs). Improvements sustaining Moore's Law drove the need to rethink MOSFET materials and structures. The display industry needs fundamental innovation at the device level. New thin‐film devices enable an inflection point in the use of displays, just as fin field‐effect transistor (FinFET) defined the inflection point in CMOS in the 2000s. This paper outlines two innovations in thin‐film device technology that offers improvement in image quality and power consumption of flat panel displays: amorphous metal gate TFTs (AMeTFTs) and amorphous metal nonlinear resistors (AMNRs). Linked through a single core material set based on mass‐producible, thin‐film amorphous metals, these two innovations create near‐ and long‐term roadmaps simplifying the production of high‐image quality, low‐power consumption displays on glass (now) and plastic (future). In particular, the field‐effect mobility of indium gallium zinc oxide (IGZO) AMeTFTs (55–72 cm2/Vs) exceeds that of IGZO TFTs developed by existing display manufacturers without the need for atomic layer deposition or vertical stacking of heterostructure semiconductor films, making AMeTFTs a natural choice for the new G8.5–G8.7 fabs targeting IGZO backplanes.


| INTRODUCTION
The display industry is approaching asymptotic limits in the performance of existing backplane technology.The following needs are becoming increasingly apparent [1][2][3][4][5] : • image refresh rates > 120 Hz for increasing image quality; • reduced power consumption for increasing screen time on mobile devices; • reduced pixel circuit area for increasing display resolution; • simplified backplane fabrication processes for increasing output capacity and panel yield; and • reducing sensitivity to photolithographic alignment for manufacturing large-area flexible displays.
Complementary metal-oxide semiconductor (CMOS) very large-scale integration (VLSI) manufacturing faced similar challenges as "Moore's Law" appeared to have reached its limits in the late 1990s. 6Innovations in device structure and gate materials, rooted in a fundamental understanding of device theory, extended the life of "Moore's Law" by 20 years through fin field-effect transistor (FinFET) technology.Similar approaches are needed in the display industry.Currently, battery life in mobile devices is dominated by the active-matrix organic light-emitting diode (AMOLED) display; over half of the battery energy is either consumed by the display backplane 7 or lost due to battery voltage upconversion to the necessary supply voltages of the system. 8The high leakage current of lowtemperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) and the relatively low field-effect mobility of indium gallium zinc oxide (IGZO) TFTs at present eliminate both as stand-alone solutions for variable image refresh rate display backplanes, where as low as 0.1 Hz of refresh rate is desired for "still" images and up to 240 Hz for dynamic images. 9The ability to reduce the image refresh rate below 60 Hz can significantly reduce the ac power consumption of capacitive loads appearing on data lines (load capacitance C L , supply voltage V DD , row frequency f ROW , and data voltage swing V SWING ), 10 which is true for LCD and emissive-type displays (OLED/ microLED) alike.
Integration of IGZO and LTPS TFTs within subpixel circuits, the first version patented by Apple in 2016, created a variable image refresh rate backplane solution termed low-temperature polysilicon oxide (LTPO) 11 aimed at reducing power consumption.The idea is similar to TFT-LCD subpixels incorporating digital memory, 12 except that the memorization is DRAM-like, achieved by isolating the storage capacitor between writes using TFT switches with very low-leakage current.The LTPO pixel circuit incorporates IGZO TFTs to overcome LTPS TFT leakage between row updates, potentially enabling very low image refresh rates, as shown in Figure 1. 13 However, LTPS has multiple processintegration issues that complicate LTPO process development, including spatially heterogeneous electrical properties, high defect densities at grain boundaries and interfaces, and high surface roughness.The high defect densities of LTPS TFTs often require post-treatment using oxygen plasma, water vapor, or hydrogen plasma, as well as post-metallization annealing; hydrogenation is a popular choice for passivating dangling bonds in both a-Si:H and LTPS alike. 14,15Integrating LTPS with IGZO exposes the IGZO to hydrogen liberated from hydrogenated silicon during passivation by laser annealing. 16The hydrogen may not only reduce field-effect mobility, but it can also increase off-state leakage current in the metaloxide TFTs. 17The combination of effects leads to compromised backplane performance.
Voltage upconversion from the typical mobile battery voltage (3.6-3.7 V 18 ) to the supply voltage is necessitated by the large saturation voltages of existing TFTs. 19igure 1  available in a mobile device.Typical OLEDs have turnon voltages in the 2-4 V range (dependent upon type). 20,21Two LTPS TFTs each require 1.5-2 V of V DS to support sufficient current for maximum OLED luminance, due to a larger threshold voltage relative to IGZO TFTs. 13It should be noted that this is not an inherent limitation of LTPS but can arise in complementary subpixel circuits, which require a threshold voltage of a few volts to ensure symmetry of operating voltage between nand p-type LTPS TFTs. 22This stack thus ensures the need for a voltage upconversion from the battery's 3.6 V level to the 5-7 V for the supply voltage V DD used in typical pixel circuits.Best-in-class voltage upconversion circuits deliver about 90% efficiency at the supply current levels required for mobile device OLED and microLED displays.As an AMOLED smartphone display consumes about 75% of battery energy, the voltage upconversion process for display V DD alone consumes 7% of battery energy at all image refresh rates.Eliminating or reducing the need for voltage upconversion is another important technological challenge.
In this report, we discuss our ongoing efforts to improve the performance of flat panel display backplanes by expanding the capability of variable image refresh rate technology, made possible through the use of thin-film devices incorporating amorphous metals, such as: • high-mobility amorphous metal gate IGZO TFTs (amorphous metal gate TFTs [AMeTFTs]) as a replacement for LTPS TFTs in active-matrix OLED/microLED displays.• low-leakage amorphous metal nonlinear resistors (AMNRs) as a replacement for a-Si:H row-select TFTs in active-matrix LCD displays.
IGZO AMeTFT technology addresses the reliability concerns of LTPO by demonstrating a 2T1C pixel circuit capable of supporting 0.1-240 Hz variable image refresh rates achieved from a high-mobility IGZO AMeTFT comparable to LTPS with low-leakage current.Figure 2 shows the emitter current during emission of a 2T1C pixel within an LED prototype, demonstrating sub-1-Hz image refresh rate capability as proof of concept for the ability of AMeTFT to improve the performance of existing electroluminescent displays (e.g., OLED/microLED).Lower refresh rates improve power consumption 23 ; higher refresh rates improve image quality. 24hile IGZO AMeTFT is potentially useful in both OLED/microLED and LCD active-matrix displays for the implementation of variable refresh rates, the use of AMNRs can provide additional cost benefits to the mature TFT-LCD industry, eliminating the need for semiconductors by replacing the three-terminal TFT with a two-terminal selector or pair of selectors for a dual select subpixel, 25 for example, for implementing dot inversion in larger sized displays.Figure 3 shows a 5-in., 85-ppi IPS AMNR-LCD prototype (designed by Amorphyx and built by BOE) with a 0.003-60 Hz variable image refresh rate and 1000 nits of brightness based on this concept.This leads to the following technical advantages: • no semiconductors: less performance variation spatially across the backplane and negligible light sensitivity; • reduced sensitivity to misalignment errors during photolithography; and • negligible off-state leakage current, ideal for low refresh rates in variable refresh displays.

| AMeTFTs AS A REPLACEMENT FOR LTPS TFTs IN ACTIVE-MATRIX OLED/microLED DISPLAYS
In this section, we discuss the primary performance benefits of AMeTFTs that make them a viable replacement for LTPS TFTs in OLED/microLED subpixel circuits and driver circuits.Circuit design via LTPS TFTs is complicated by its characteristic low output impedance (kink effect) and spatial heterogeneity (grain structure).IGZO TFTs are better in both aspects but typically have lower field-effect mobility.The IGZO AMeTFT has field-effect mobility comparable to LTPS, enabling similar drive current capability for monolithic IGZO subpixel circuits and integrated driver circuits alike.The structure of an AMeTFT is shown in effect transistors (FETs) relative to that of polycrystalline gates.The threshold voltage in FETs is sensitive to changes in the work function of the gate, which can vary spatially along its surface adjacent to the gate insulator.For example, the grain structure in polycrystalline metals has been attributed to work function variation at the gate/insulator surface in planar FETs. 26This variation is a dominant source of threshold-voltage instability in bulk planar FETs and a major barrier to scaling towards nanometer dimensions.By contrast, the use of amorphous metal gates has been shown to reduce variability of threshold voltage and transconductance with dimensional scaling, attributed to a combination of variation in work function, fixed oxide charge, and interface states, 27 as illustrated in Figure 5. Based on these results, the use of an AMeTFT is also expected to lead to lower variability in electrical parameters, particularly at smaller gateinsulator thicknesses and/or channel lengths where effects due to variation are more pronounced.
In addition to reducing variability, the use of amorphous metal gates in TFTs leads to higher field-effect mobility relative to TFTs with polycrystalline-metal gates.In Figure 6, the field-effect mobility of identically prepared IGZO TFTs having different polycrystalline gate metals is compared to a-TiAl 3 gate as a function of root mean square (RMS) roughness R q .
The RMS roughness of a-TiAl 3 is between 0.2 and 0.4 nm, whereas the RMS roughness of Mo, Ti, and AlNd is between 0.6 and 2.1 nm, as determined by atomic force microscope (AFM) characterization, as shown in Figure 7.As shown in Figure 6, the median field-effect mobility is higher using a-TiAl 3 by approximately 15% compared to polycrystalline Mo, Ti, and AlNd.The increase in fieldeffect mobility can be due to a combination of effects related to the gate interface morphology, ultimately determined by the choice of gate electrode.The reduced surface roughness of a-TiAl 3 is attributed to its amorphous nature, supported by the observations of a broad amorphous peak in the glancing incidence X-ray diffraction pattern, shown in Figure 8A, and the smooth, fine-grained surface topology, shown in Figure 7. Additionally, the chemical composition of the films was determined by X-ray photoelectron spectroscopy (XPS) measurements to have a Al/Ti ratio of 2.7/1, as shown in Figure 8B, which is close to the theoretical ratio of 3/1, leading to an amorphous phase. 28,29The trace amounts of Fe and Ru are equal to the trace amounts present in the TiAl 3 sputter target.
Due to inherent advantages in electrical performance compared to TFTs having polycrystalline gates, AMeTFTs have been developed, having a field-effect mobility comparable to the lower end of hydrogenated, rapid excimer laser annealed LTPS typically used in mass production of displays (>80 cm 2 /Vs 30 ), 13 but still less than higher end rapid, laser-annealed LTPS (124.1 cm 2 /Vs 31 ), and LTPS obtained using non-laser crystallization methods such as metal-induced lateral crystallization (121 cm 2 /Vs 32 ). Figure 9 shows a comparison of n-and p-type LTPS TFTs to an AMeTFT developed at Amorphyx.The current is normalized to account for differences in the aspect ratios of the devices (n,p-LTPS 10 μm/3 μm, AMeTFT 9 μm/9 μm).We note that the channel length of LTPS TFTs is typically larger than that of IGZO TFT in LTPO F I G U R E 7 AMF surface micrograph of (A) amorphous gate TiAl 3 with a surface roughness (R q ) less than 0.3 nm, which is similar to the Corning eagle glass surface roughness (<0.5 nm).Also shown are polycrystalline (B) Mo, (C) AlNd, and (D) Ti. circuits in practice, 13 likely due to the improved temperature-dependent reliability of LTPS TFTs having longer channel lengths. 33As shown, the values for the on-state currents of the two devices are similar, indicating similar current-driving capability in a pixel circuit.This is despite the difference in maximum field-effect mobility: 101 cm 2 /Vs for nLTPS, 105 cm 2 /Vs for pLTPS, and 65 cm 2 /Vs for IGZO AMeTFT.The most significant difference is in the off-state leakage current.The n-and p-LTPS TFTs have a much higher leakage current, which is strongly dependent on the drain voltage, exceeding 1 nA at a gate-source voltage of À15 V, compared to 1 pA at À15 V for the AMeTFT.It should be noted that the true off current may not be measurable in the case of IGZO for small drain-source voltages due to its large bandgap (>3 eV) 34 compared to silicon (1.12 eV). 35The observed value in this case is most likely an equipment limitation and is likely much lower in practice.
With a high field-effect mobility comparable to LTPS TFTs, IGZO AMeTFTs can replace LTPS TFTs in activematrix OLED displays for monolithic backplanes based entirely on amorphous IGZO TFTs.Integrated data drivers based entirely on IGZO TFTs exist, 36 despite being based on low-mobility IGZO TFTs (6.5-8.6 cm 2 / Vs).A tradeoff exists between TFT mobility and bezel size in mobile devices.It was argued that IGZO TFTs with mobility greater than 50 cm 2 /Vs can replace LTPS TFTs in output buffers while maintaining a narrow bezel (<200 μm) in mobile AMOLED display formats. 37The higher output impedance of IGZO TFTs and improved spatial uniformity of electrical properties help explain why IGZO backplanes were forecasted for 2023 in new G8.5-G8.7 fabs by major display manufacturers. 38he 2T1C prototype shown in Figure 2 has switching TFT and driving TFT, which are both IGZO AMeTFTs developed by Amorphyx.This is made possible due to the exceptional current-driving capability of AMeTFTs comparable to LTPS, stemming from their high field-effect mobility.Figure 10 shows a summary of various performance metrics for an AMeTFT, including maximum field-effect mobility, threshold voltage, minimum subthreshold swing, and drain-current on/off ratio.As shown, the median field-effect mobility is approximately 62 cm 2 /Vs, which is close to values reported for low-end, rapid laser-annealed LTPS. 39We note that this high mobility is achieved using a single IGZO layer, deposited via sputtering, which is more suited for mass production than atomic layer deposition methods used to obtain semiconductor heterojunctions. 40Moreover, high mobility is achieved using a single-gate electrode, which uses fewer photolithography steps compared to double-gate TFTs. 41 representative device was selected, exhibiting a peak field-effect mobility of 65 cm 2 /Vs, as shown in Figure 11.Assuming a gate voltage equal to the battery voltage of 3.6 V, the on-state resistance of this device is estimated at 35 kΩ using parameters obtained from the well-known Rensselaer Polytechnic Institute (RPI) model implemented in AIM-Spice. 42e note that typical gate drivers use output buffers to achieve voltage upconversion and drive switch TFTs at higher voltages, which can further reduce the on-state resistance with a negligible increase in power consumption on loading of the gate, since the gate leakage of the switching TFT is negligible.Nonetheless, this on-state resistance obtained using the typical mobile battery voltage is within the range needed for refresh rates above 120 Hz for full HD, 4K, and 8K displays, as shown in Figure 12.This analysis is based on simple 2T1C design considerations, including settling time for storage capacitor voltage during charging cycles, stability of storage capacitor voltage between charging cycles, and storage capacitor charging errors due to capacitive loading by the driver TFT.The expected range of frame rates can be estimated as follows, where R OFF is the off-state resistance of the switch TFT, R ON is the on-state resistance of the switch TFT, C ST is the storage capacitance, C OX is the gate-insulator capacitance density, W and L are the channel length and width of the switch TFT, N R is the number of rows in the display, and η P is the duty cycle of the programming pulse, expressed as a ratio.Moreover, exponential fitting of the hold current decay in Figure 2  the 2T1C are indicated in Figure 13, using the same analysis.Based on these combined results, the IGZO AMeTFT can support an estimated variable refresh rate from 0.1 to 240 Hz at 4K format and from 0.1 to 120 Hz at 8K format with a 10-pF storage capacitor.Increasing the frame rate from 120 to 240 Hz at 8K format requires a 1.75Â increase in field-effect mobility, or a mobility of 113 cm 2 / Vs, which is impractical.Instead, the storage capacitor can be reduced at the expense of increasing the low-end refresh rate between 0.1 and 1 Hz to achieve a sub-1-Hz low-end and 240-Hz high-end refresh rate at 8K.Alternatively, the drive voltage on the switching TFT can be increased using voltage upconversion.Since the scan voltage drives the gate of the switch TFT, there is negligible static power consumption due to negligible gate leakage current.We note that this analysis is not exact but is sufficient to demonstrate the potential of IGZO AMeTFT pixel circuit technology.
An additional consideration that is important for realizing a high refresh rate is the parasitic capacitance contribution from other rows during the programming of a given row, which includes a portion of the channel capacitance in addition to overlap capacitance.A simple estimate in terms of the channel dimensions (W, L), gate capacitance (C OX ), and gate-source overlap capacitance (C GS0 ) is given by Self-aligned TFTs have the advantage of lower overlap capacitance and are therefore expected to scale better as the number of rows in a display increases.In Figure 14, we compare the channel capacitance of a self-aligned LTPS TFT 43 to IGZO AMeTFT.As shown, the off-state channel capacitance of the IGZO AMeTFT is higher than that of the self-aligned (SA) LTPS due to gate-source/drain overlap capacitance.We note that future iterations of IGZO AMeTFT will likely employ a self-aligned bottomgate process (requiring backside exposure) as future improvements in order to simultaneously take advantage of a smooth gate electrode while eliminating the parasitic capacitance due to gate-source/drain overlap.
By replacing LTPS TFTs with AMeTFTs, the reliability of variable refresh rate active-matrix OLED backplanes can also be improved through the elimination of hydrogen-related threshold-voltage instability originating from LTPS passivation.Hybrid LTPO circuits used for variable refresh rate displays combine the high current drive capability of LTPS TFTs with the low leakage of amorphous IGZO TFTs. 11However, LTPS is typically produced from plasma-enhanced chemical vapor deposited (PECVD) silicon, which is amorphous as-deposited, contains excess hydrogen, and requires additional processing to crystallize and passivate defects, 14 leading to the diffusion of hydrogen within the backplane.The presence of excess hydrogen creates device instabilities in the IGZO TFTs adjacent to the LTPS TFTs. 11Therefore, eliminating the LTPS TFTs and replacing them with IGZO AMeTFTs would reduce instability in variable refresh rate displays without compromising performance.

| AMNRs AS A REPLACEMENT FOR a-Si:H ROW-SELECT TFTs IN LCDs
In this section, we discuss some of the advantages of AMNRs over a-Si:H TFTs as the row-select switching device in a large-area, active-matrix LCD display.Although the IGZO AMeTFT is also expected to be useful in TFT-LCD, the use of AMNRs is expected to provide unique reductions in process complexity and manufacturing cost by eliminating the use of semiconductor layers, while also enabling variable refresh rates over a wider range of frequencies than existing LCDs, and eliminating stability concerns related to threshold voltage shifts inherent to a-Si:H TFTs.
TFT-LCD is a mature market wherein manufacturing decisions are driven primarily by commercial and financial considerations, that is, cost and yield, as opposed to novel performance advantages.The volume of LCD TVs first exceeded that of CRT TVs in 2008, due to the rapid growth of LCD manufacturing technology and continuous reductions in manufacturing costs. 44Of the many factors contributing to reductions in panel cost, process simplification efforts for the backplane, such as the development of a four-mask TFT process and liquid-crystal drop filling, 45 have been key contributors to reducing cost to within $10 per diagonal inch.
The elimination of semiconductor layers in an LCD backplane can reduce cost by reducing process and manufacturing complexity, with the additional benefit of improving variable refresh rate capability.The typical LCD backplane pixel consists of a row-select switching TFT with a bottom-gate staggered structure and indium tin oxide (ITO) interdigitated electrodes. 46For an a-Si:H TFT, the device stack consists of a gate metal, SiO 2 /SiN X gate insulator, a-Si:H active layer, n+ a-Si:H contact layer, source and drain metal contact, and an SiO x intermetal dielectric, for a total of seven layers and five masks.It should be noted that five is the minimum mask count for the fabrication of a conventional TFT fabrication, while the mask count can be reduced to four using the slit photolithography technique. 44Removing the use of a semiconductor in the switching device will not only remove the a-Si:H layer used in the TFT but also the associated n+ a-Si:H contact layer and the need for a gate insulator made up of a SiN X F I G U R E 1 5 Process flow comparison between typical a-Si:H inverted statggered TFT for LCD and AMNR device for LCD.
F I G U R E 1 6 AMNR IV characteristics (one and two connected AMNR devices) and device structure.
and SiO 2 stack.As a result, the total layer count can potentially drop from seven to four and reduce the mask count from five to three, as shown in Figure 13.With respect to enabling variable refresh rates, the limitation is imposed by the leakage current, or off-state resistance, for the lowfrequency refresh rate and the saturation current, or onstate resistance, for the high-frequency refresh rate.The semiconductor layer introduces a limitation at both ends of the frequency range; in simplest terms, the field-effect mobility of the semiconductor will limit the high-end refresh rate, and the off-state leakage current will limit the low-end refresh rate.
The AMNR is a two-terminal resistive switch consisting only of metals and insulators; there are no semiconductor layers. 25The AMNR device is a bidirectional switch with a roughly symmetrical current-voltage characteristic, similar to a triac (two thyristors connected antiparallel) with a floating gate, as shown in Figure 15.The diode-like asymmetry is related to the asymmetry in the tunnel barrier heights of the two metal/insulator junctions.The "back-to-back" configuration should lead to symmetry in the IV characteristics by ensuring that electrons are injected from the high barrier interface to the insulator for both positive and negative applied voltages.Since the structure consists of metal-insulator junctions, conduction through an AMNR is expected to consist of any number of the basic conduction processes in insulators, including tunneling (direct and Fowler-Nordheim), thermionic emission, Poole-Frenkel emission, ohmic, ionic, or space-charged limited. 35For thin, high-quality gate insulators, for example, those used in high-performance FETs, conduction is primarily due to tunneling.The current is therefore expected to scale linearly with the cross-sectional area of the crossbar pattern formed by the overlapping electrode junction.The current-voltage characteristics of an AMNR are shown in Figure 16, where the current increases nonlinearly as a function of the voltage across the tunneling insulator when the voltage is above the turn-on point.][49][50] With the absence of semiconductor layers, AMNRs are less sensitive to precision in photolithography, potentially increasing overall yield and throughput.TFTs require precise alignment between the gate and source/drain electrodes in order to function properly.AMNRs, by contrast, can tolerate large misalignment errors in electrode placement.For example, consider a 5-μm misalignment error in the placement of the source/drain electrodes in an inverted staggered TFT, compared to the same misalignment error in an AMNR as shown in Figure 17.
F I G U R E 1 7 Illustration comparing the tolerance of AMNR and TFT to misalignment errors.
In the case of a TFT, the misalignment causes the contact resistance 51 to increase, such that the on-state current is greatly diminished.It has been shown that even a slight gate to the source/drain underlap can cause the maximum drain current to exponentially reduce. 52In the case of the AMNR, the misalignment of the layers will not result in a non-functional device; rather, it will change the expected current at a given voltage due to the reduction in area.This can be addressed by a simple change in the applied voltage.

CONCLUSION
This work discussed two key innovations in thin-film electronics for displays based on the use of amorphous metals: IGZO AMeTFTs and AMNRs.The IGZO AMeTFT integrates the low-leakage current performance of IGZO TFTs with the high field-effect mobility and good operating bias stability of LTPS TFTs through the use of an amorphous TiAl 3 gate.IGZO AMeTFT redefines active-matrix OLED/microLED backplane pixel circuit complexity, simplifying backplane fabrication and opening new opportunities for high-performance, lowpower consumption small-to-large-area displays.In addition, the inherent mechanical flexibility of amorphous metals creates a viable roadmap towards IGZO AMeTFT and AMNR fabrication on flexible substrates.
The IGZO AMeTFT should enable future reductions of supply voltages, addressing concerns regarding power consumption due to voltage upconversion, achieved through its superior dimensional scalability compared to LTPS.The high reactivity between IGZO and other oxide materials is well suited for its integration with high-k dielectrics, such as Al 2 O 3 , as we have demonstrated, currently at 75-nm insulator thickness with a static permittivity of 8.5.This chemical compatibility is unlike polysilicon TFTs, in which the ideal gate insulator is SiO 2 , which has a low dielectric constant of 3.9.Additionally, the reduced surface roughness of the amorphous metal TiAl 3 gate, combined with an amorphous Al 2 O 3 gate insulator, leads to an ideal, smooth template on which to deposit the semiconductor.This too is unlike polysilicon, in which laser annealed films can exhibit RMS roughness exceeding 5-20 nm, 16 which is expected to lead to large variation upon reduction of physical dimensions and limit reductions in gateinsulator thickness.These considerations make AMeTFT a superior long-term choice in terms of reliability and dimensional scaling of oxide thickness, channel length, and channel width.
The AMNR reduces the manufacturing complexity of TFT-LCD backplanes by eliminating the semiconductor entirely and replacing it with a two-terminal selector.The use of AMNRs in LCD backplanes is expected to result in higher yield, lower variation, and a wider range of variable refresh rates.Perhaps the greatest value of AMNRs to the future of displays-fast, flexible, and simple-results from the dramatic reduction in vertical alignment requirements.The message from Figure 3 is that a high-image quality display can be produced using AMNR with minimal concern for layer-on-layer alignment.The lower complexity of AMNRs has the potential to lower fabrication costs.Additionally, the reduced sensitivity to alignment errors may lend itself well towards the fabrication of AMNR-based circuits on flexible substrates.Perhaps the evolution away from semiconductor-based TFTs-rooted in local carrier transport (drift/diffusion)-towards metal-insulator-metalbased devices rooted in nonlocal carrier transport (tunneling) represents the most fundamental innovation of all.
illustrates this second major power consumption issue with LTPO:2 or 3 TFTs in series between V DD and V SS , requiring V DD in excess of the 3.6-V battery voltage F I G U R E 1 An LTPO circuit implementation from Sharp.IGZO TFTs are shown in red.Source: Figure adapted from [13].

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I G U R E 2 (top) 2T1C OLED drive current hold performance at V DATA = 5 V. (bottom) IGZO AMeTFT 2T1C pixel circuit layout.The circuit stack is fabricated using six single-tone masks.F I G U R E 3 Amorphyx 0.003-60 Hz variable image refresh rate, 1000-nit, 85-ppi AMNR-IPS 5-in.AMNR-LCD prototype.The red circles indicate an alignment error of 4 μm between the top electrode and the interconnect; despite this, the prototype yielded.

Figure 4 .
As shown, the structure is bottom gate, top contact (inverted staggered), in which the gate metal is amorphous.In our work, the amorphous metal gate is TiAl 3 , which has a bulk resistivity of 190 μΩ cm, a work function of 4.3 eV, and a typical RMS surface roughness of 0.3 nm.This is compared to polycrystalline Mo commonly used as a gate electrode in inverted staggered TFTs, which has a bulk resistivity of 13.5 μΩ cm, a work function of 5.1 eV, and a RMS surface roughness of 0.75 nm.The use of amorphous metals as gate electrodes has been shown to lower variability in conventional field-F I G U R E 4 Comparison of (A) typical display industry IGZO TFT with (B) Amorphyx IGZO AMeTFT.

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I G U R E 5 (A-C) VLSI CMOS FinFET performance benefits from replacing the crystalline metal gate electrode with amorphous metal.Source: Figure adapted from [27].

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I G U R E 6 Normalized FET mobility (normalized to the maximum mobility in the data set) of identically prepared IGZO TFTs with different, common gate materials.

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I G U R E 8 (A) Glancing incidence X-ray diffraction data and (B) surface chemical composition estimated from X-ray photoelectron spectroscopy data.F I G U R E 9 Comparison of n-and p-LTPS TFT and Amorphyx IGZO AMeTFT.
yields an off-state resistance of 9.7 Â 10 12 Ω.The off-state resistance requirements for F I G U R E 1 0 Summary of electrical performance of IGZO AMeTFTs: (A) field-effect mobility; (B) threshold voltage; (C) subthreshold swing; and (D) on/off ratio.

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I G U R E 1 1 Representative AMeTFT for analysis, showing (A) transfer characteristics and (B) field-effect mobility evaluated in the linear regime.Fitting was performed using the RPI model and square law models.F I G U R E 1 2 Estimated on-state resistance requirements for switching TFT in a 2T1C in (A) FHD, (B) 4K, and (C) 8K image formats.

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I G U R E 1 3 Estimated off-state resistance requirements for switching TFT in a 2T1C for various frame rates used for still images.F I G U R E 1 4 Comparison of normalized gate capacitance between AMeTFT and LTPS self-aligned TFT structures.