Giant Spin‐Valve Effect in Planar Spin Devices Using an Artificially Implemented Nanolength Mott‐Insulator Region

Developing technology to realize oxide‐based nanoscale planar integrated circuits is in high demand for next‐generation multifunctional electronics. Oxide circuits can have a variety of unique functions, including ferromagnetism, ferroelectricity, multiferroicity, superconductivity, and mechanical flexibility. In particular, for spin‐transistor applications, the wide tunability of the physical properties due to the presence of multiple oxide phases is valuable for precise conductivity matching between the channel and ferromagnetic electrodes. This feature is essential for realistic spin‐transistor operations. Here, a substantially large magnetoresistance (MR) ratio of up to ≈140% is demonstrated for planar‐type (La,Sr)MnO3 (LSMO)‐based spin‐valve devices. This MR ratio is 10–100 times larger than the best values obtained for semiconductor‐based planar devices, which have been studied over the past three decades. This structure is prepared by implementing an artificial nanolength Mott‐insulator barrier region using the phase transition of metallic LSMO. The barrier height of the Mott‐insulator region is only 55 meV, which enables the large MR ratio. Furthermore, a successful current modulation, which is a fundamental functionality for spin transistors, is shown. These results open up a new avenue for realizing oxide planar circuits with unique functionalities that conventional semiconductors cannot achieve.


Introduction
Oxide materials are expected to be used for creating novel functionalities that conventional semiconductor devices cannot semiconductor-based devices when measured under a constantvoltage condition at ≈1.4 K (or 80% under a constant-current condition with Esaki-diode tunneling contacts). [9] In theory, to obtain a large MR ratio, the contact resistance of FM electrode/nonmagnetic semiconductor interfaces needs to be adjusted within a narrow window. [16,17] When the contact resistance is too small, the so-called conductivity mismatch problem arises, in which spin accumulation does not occur in the nonmagnetic semiconductor channel, leading to a small MR ratio. [18] This problem is addressed by inserting a tunnel barrier region between electrodes and semiconductors [16,17,[19][20][21] or introducing ballistic carrier transport, realized with highly mobile carriers or a short channel length, [17,[22][23][24] instead of diffusive transport. However, making small spin devices is still challenging. A too large contact resistance is also problematic. In this case, the dwell time of carriers in the nonmagnetic semiconductor channel becomes long, which causes spin flipping. Generally, obtaining an adequate contact resistance is difficult because a Schottky barrier is naturally formed at metal/semiconductor interfaces. [25,26] Such inflexibility in designing interfaces is a significant problem for further developing semiconductor spintronics devices.
Meanwhile, the physical properties of oxide materials are easily changed through phase transitions by simply changing the stoichiometry of compounds. [27,28] For instance, La 1−x A x MnO 3 (A = Sr, Ca) exhibits a variety of properties depending on the content x of A, that is, the composition ratio of Mn 3+ to Mn 4+ . As the fraction of the 4+ valence state increases, La 1-x A x MnO 3 transforms from an antiferromagnetic Mott insulator to an FM Mott insulator and an FM metal phase. In the case of La 1-x Sr x MnO 3 , the composition ratio of the Mn valence states also depends on the oxygen vacancy density, [29] which can induce a reversible metal-insulator transition (MIT) of the originally metallic oxide La 0.7 Sr 0.3 MnO 3 . [30] As the vacancy density increases, the crystal structure changes from rhombohedral to orthorhombic without significant degradation in the crystallinity. [31] A method to induce oxygen vacancy while maintaining the crystallinity of a film is ion irradiation; recently, the MIT of La 0.7 Sr 0.3 MnO 3 has been demonstrated by He ion irradiation. [32] The oxygen vacancies also degrade the ferromagnetism of La 0.7 Sr 0.3 MnO 3 , [33] which is preferable when intentionally creating a magnetically inactive region in an FM layer. Considering the unique features of oxide materials, one can expect flexible oxide-based circuit design by inducing phase transitions in intended areas via lithography patterning, through which the conductivity at desired locations can be arbitrarily controlled from metal to insulator. Due to the high crystallinity of perovskite oxides even after oxygen-vacancy incorporation that induces MIT, oxide devices may take advantage of ballistic transport of carriers, which is significantly desirable, especially for realizing planar spintronics devices.
Here, we demonstrate extremely large MR ratios of up to ≈140% in planar-type spin-valve devices of an epitaxial La 0.67 Sr 0.33 MnO 3 (LSMO) layer grown on a SrTiO 3 (STO) substrate. These MR ratios are 10-100 times larger than the best values previously obtained for planar devices. Our devices have a nanometer-length Mott-insulator region of oxygen-deficient LSMO formed by Ar ion irradiation. Ar ion irradiation is a wellestablished method to induce oxygen vacancies in a region with a depth of ≈10 nm from the surface of perovskite-oxide thin films. [34][35][36][37] This unique nanoprocessing technique enables bal-listic transport of spin-polarized carriers between the LSMO electrodes, leading to a sizeable spin-valve effect. Furthermore, we successfully demonstrate gate modulation of the current, which is an essential step for realizing oxide-based spin transistors. Our findings will illuminate the potential of multiphase oxide materials for spintronics applications.

Preparation of the Spin-Valve Devices
We grow an FM LSMO (30 unit cells (u.c.) ≈ 12 nm) layer on a TiO 2 -terminated STO substrate at 720°C by molecular beam epitaxy (MBE) (see Section 7 and Figure 1a). The high crystallinity of our sample can be confirmed in the cross-sectional high-angle annular dark-field scanning transmission electron microscopy (HAADF-STEM) image shown in Figure 1b. The Curie temperature and the coercive field of the LSMO layer are estimated to be 330 K and 0.1 kG, respectively, by a superconducting quantum interference device ( Figure S1, Supporting Information). After growth of the LSMO layer, a 10 nm-thick Al layer is sputtered on the sample to make alignment marks for electron-beam (EB) lithography. The sample is then processed into the form of the two-terminal spin-valve device illustrated in Figure 1c. To prepare our devices, first, the LSMO layer is etched into a 6 μmwide bar. Then, we induce the MIT in a narrow section of the LSMO bar by irradiating the sample with Ar ions (see Section 7 and Figure 1d). By transforming this narrow region into an insulator, this bar becomes a two-terminal spin-valve device. As reference experiments, we investigate the change of the magnetic properties by Ar ion irradiation for a plain LSMO layer with an Al layer on top, as shown in Figure S2, Supporting Information. We make three devices with a designed channel length of the resist pattern of 10 nm (device A), 20 nm (device B), and 30 nm (device C). We confirm that the actual lithography patterns have a channel length close to the designed value by scanning electron microscopy (SEM), as shown in Figure 1e, where the length of the EB resist pattern after the development process is as small as 36 nm for device B. The channel length of device C is 50 nm, as can be seen in the enlarged view of the etched resist pattern shown in Figure S3, Supporting Information. In both devices, the actual channel length is at most twice the length of the designed lithography pattern. After EB lithography and Ar ion irradiation of the narrow region, the device is annealed at 600°C at 1 atm under an oxygen atmosphere to compensate for the excessive oxygen deficiency caused by the abovementioned processes. Figure 1f-h shows SEM images of the processed devices. The temperature dependence of the resistance between the LSMO electrodes is measured for devices A-C, as well as for reference devices without an MIT channel (device X) and with a long MIT channel of 130 nm (device Y) (see Figure S4, Supporting Information). While device A shows metallic behavior (33 kΩ at 3 K when measured with a constant current of 100 nA), devices B and C show insulating behavior (760 kΩ at 3 K with a constant current of 100 nA for device B and 13 MΩ at 3 K with a constant current of 100 nA for device C). These results indicate that the Ar-exposed region does not entirely become insulating in device A while the entire exposed region becomes insulating in devices B and C.  The yellow line represents the region exposed to Ar-ion irradiation. The broken line in device A indicates that the exposed region is not entirely transformed into an insulator, while the solid lines in devices B and C indicate that the entire region becomes insulating. One can see melted Al in the SEM images due to the annealing (white patterns on the electrodes), which is not crucial for the following measurements.  Figure S5, Supporting Information). The difference in the coercive fields is achieved by the different geometry of the two electrodes on either side of the MIT region of our devices (see Figure 1f-h). The spin-valve signal of device B shows an MR ratio of up to 115%, the largest value among those reported for planar spin-valve devices. In contrast, metallic device A shows no spinvalve signal. As shown in Figure 2d, a minor loop is observed for device B, proving that the antiparallel magnetization state is stable even at zero magnetic field, an essential requirement for spin-valve devices. Moreover, device B possesses an even larger MR ratio of ≈140% at near-zero bias, which is confirmed by deriving the MR ratio from the current (I)-voltage (V) data in the parallel (major loop) and antiparallel (minor loop) magnetization states at 0 kG, as shown in Figure 2e. The MR ratio has the typical temperature dependence of the tunneling magnetoresistance (TMR) in LSMO-based magnetic tunnel junctions [38] (Figure S6, Supporting Information), which will be improved by suppressing dead layer formation at the LSMO interfaces. In Figure 2e, the MR ratio monotonically decreases as the bias voltage increases, similar to the typical TMR. However, the device still exhibits MR ratios as high as 46% and 23% at bias voltages of 100 and 200 mV, respectively, which means that the spin-dependent output voltage ΔV = (MR ratio) × V for both cases is 46 mV, the highest value for planar devices. [39] A large output voltage is essential for flawless read-out. The asymmetric MR curve of device B may reflect the multiple domain structures in the metal LSMO electrodes. Previous photoemission electron microscopy studies on LSMO thin films showed magnetic domain structures with a size of ≈1 μm. [40,41] Thus, our LSMO electrodes with a width of 6 μm can have several magnetic domains. The intermediate resistance state with the MR ratio of around 80% in Figure 2b may also originate from such complex domain structures.

Magnetoresistance Characteristics of Spin-Valve Devices
To confirm that the observed MR characteristics originate from the spin-valve effect, we analyze the magnetic-field-orientation dependence of the MR curve for device B (see Section 7 and Figure 3a). This device shows apparent uniaxial magnetic anisotropy along the [100] direction, which is the direction of the MIT region pattern (see Figure 1c). Considering that the easy magnetization axis of LSMO films grown on STO is generally along [110], [42,43] our result means that the shape of the MIT region strongly influences the magnetic anisotropy of the LSMO electrodes. This result contrasts with the behavior obtained for metallic device A, which shows neither a spin-valve signal nor a magnetic-field-orientation dependence ( Figure S7, Supporting Information). This result indicates that the MIT   region electrically separates the LSMO electrodes in device B (and device C). In addition, our result for device B can rule out tunneling anisotropic magnetoresistance (TAMR) as the origin of the spin-valve signal. The sign of the spin-valve signal for device B is positive for all magnetic field orientations (Figure 3b-e), unlike TAMR, in which the sign changes when the magnetic field direction is altered by 90°. [44] Therefore, we can conclude that the large MR ratio obtained for device B (and device C) arises from the magnetization configuration of the LSMO electrodes sandwiching the MIT region, that is, the spin-valve effect.

Transport Mechanisms
To understand the carrier-transport mechanism between the two LSMO electrodes, we analyze the I-V characteristics of device B. The I-V data show nonlinear characteristics and can be well fitted with Simmons' equation, which is a tunnel-current model [45] (see Figure 4a-c and Section 7). The best-fit parameters are Φ = 55.5 meV, d = 4.0 nm, and t = 0.7 nm, where Φ is the mean tunnel barrier height, d is the effective barrier-region length, t is the mean thickness of the conduction region, m* = 0.6m 0 is the www.advancedsciencenews.com www.advmat.de effective mass of the light hole in LSMO, [46] and m 0 is the electron mass. This tunneling picture is consistent with the temperature dependence of the resistance of this device ( Figure S4a-c, Supporting Information), in which the resistance does not change exponentially, indicating that the effect of thermally excited carriers is negligible and that tunneling transport is dominant in the low-bias region.
The estimated Φ = 55.5 meV is approximately identical to the bandgap of LaMnO 3 (LMO) of 0.24 eV, [47] which corresponds to the most extreme case of the MIT of LSMO, that is, the valence of the Mn ions is entirely 3+, and no 4+ state exists. This fact supports the idea that the carriers are transported through the MIT region. This Φ value is much smaller than the height of the Schottky barrier (1.2 ± 0.1 eV) formed at the interface between metallic LSMO and semiconducting Nb:STO reported by a photoemission spectroscopy study. [48] Thus, carriers are not injected from the metallic LSMO into the nonmagnetic STO substrate in our device. An X-ray photoemission spectroscopy (XPS) measurement further supports this understanding; the valence state of Ti at the LSMO/STO interface is entirely 4+ similar to normal insulating STO ( Figure S8, Supporting Information). Therefore, the STO substrate does not contribute to the carrier transport because a Ti 3+ peak would be observed in the Ti 2p XPS spectrum when STO is conductive. [49] The short d value (4 nm) compared with the lithography pattern of ≈40 nm (see Figure 1e) indicates that the heat induced by Ar ion irradiation, which causes the MIT, is only partially transferred to the bottom of the LSMO layer. Thus, the lateral length of the MIT region is thought to become smaller in the depth direction, making the effective barrier-region length shorter (Figure 4d). Another possible reason for the short d is the slightly tilted incident angle of the Ar ion beam during the irradiation process (see Section 7). The lithography pattern after resist development has a high aspect ratio, as shown in Figure 1d, and when the Ar ion beam irradiates the sample, some areas are shielded from the ion beam. This would make the processed channel length smaller than the lithography pattern. The obtained mean thickness of the conduction region suggests that a very thin region of the channel contributes to carrier transport. We note that the I-V characteristics of device C (Φ = 44.5 meV, d = 37.7 nm, and t = 0.1 nm; see Figure S9, Supporting Information) and another two-terminal device prepared using a thinner LSMO layer with a thickness of 20 u.c. (≈8 nm) can also be well fitted with Simmons' equation (Φ = 77.5 meV, d = 6.7 nm, and t = 1.8 nm; see Figure S10, Supporting Information). Notably, in addition to at low bias voltages where tunneling transport is dominant (Figure 4e), our device maintains spin-valve operation at bias voltages higher than the estimated tunnel barrier height Φ (55.5 meV; see Figure 2e). This indicates that the spin-polarized carriers are injected into the lower Hubbard band channel of the insulating LSMO region, as schematically illustrated in Figure 4f. This channel transport is also an essential requirement for spintransistor operation.

Back-Gate Modulation of the Current
The following gate experiment supports the abovementioned scenario that carriers are transported through the MIT region. Here, we prepare another LSMO-based spin-valve device with a back- gate electrode (named device D) using the same MIT implementation process as that used for device B (see Section 7 and the inset of Figure 5). In device D, the current decreases as the positive gate voltage (V G ) increases, indicating that hole carriers dominate the transport. This result is reasonable since the carriers in LSMO are holes. The measured I-V curve in the low-bias region under the back-gate bias voltage of ≈100 V can be well reproduced by Simmons' equation considering the change in the tunnel barrier height induced by the carrier density modulation due to the capacitance of the STO substrate (see Figure 4e,f, Figure S14, Supporting Information, and Section 7). The weak gate modulation in the negative V region may suggest unintended asymmetry between the interfaces on the two sides of the MIT region. This successful current modulation by the back-gate electric field is promising for applying our spin-valve devices to spin MOSFETs.

Conclusion
We have demonstrated an extremely large MR ratio in planar spin-valve devices by exploiting a nanofabrication technique and using the emerging properties of the strongly correlated electrons in LSMO. We form a short low-barrier-height insulating region by inducing the MIT in a narrow area of the LSMO layer. In the two-terminal constant-voltage measurement, the device shows an MR ratio of up to 140% at 3 K. This MR ratio is the highest among those reported for planar-type spin-valve device structures. The successful fitting of the I-V data using the tunnelcurrent model indicates that tunneling transport occurs through the MIT region with a small bandgap in the devices. A backgate modulation experiment confirms the hole conduction of our devices. Since holes dominate the transport in LSMO, our result proves that holes are transported through the Mott-insulatorphase region of LSMO. The successful back-gate modulation of the current in our device is promising for application to transistor operation. Our results open up a new avenue for creating multifunctional oxide planar circuits and oxide-based planar spin www.advancedsciencenews.com www.advmat.de transistors, which have been very difficult to build based on semiconductors.

Experimental Section
Growth of (La,Sr)MnO 3 : An LSMO (30 u.c. ≈ 12 nm) layer was grown by MBE on a TiO 2 -terminated STO substrate using a shuttered-growth technique with La, Sr, and Mn fluxes supplied from Knudsen cells. Prior to growth, to obtain a TiO 2 -terminated surface, the STO substrate was etched with buffered hydrofluoric acid for 30 s and annealed at 1000°C for 1 h under ambient conditions. During growth, oxygen was provided as a mixture of O 2 (80%) and O 3 (20%) with a background pressure of 2.0 × 10 −4 Pa in the MBE chamber. The growth of the LSMO layer was monitored in situ by reflection high-energy electron diffraction (RHEED), which showed a streaky pattern, indicating epitaxial growth of the LSMO layer on the STO substrate ( Figure S11, Supporting Information). After growth, the sample was annealed at 600°C under 1 atm pressure of pure oxygen for 2 h to compensate for excessive oxygen vacancies in the samples.
Ar-Ion Irradiation Process to Induce the Metal-Insulator Transition: After the MIT region of the LSMO bar was defined by EB lithography, it was irradiated with Ar ions for 2 min and 45 s. The acceleration voltage of the ions was 500 V, and the beam intensity was 0.13 mA cm −2 . The incident angle of the ion beam was 5°from the normal direction of the substrate to prevent adhesion of the etched substances.
Magnetic-Field-Orientation Dependence Measurements: The MR curves for various external magnetic field orientations ϕ ( Figure 3) were obtained with a bias voltage of 50 mV at 3 K by changing the angle of the magnetic field direction by a step of 15°. First, the magnetizations of the LSMO electrodes were aligned in the same direction (parallel state, i.e., lowresistance state) by applying an external magnetic field of 1 T in the direction opposite to ϕ. Then, the resistance of device B was measured under an increasing magnetic field in the ϕ direction.
Analysis of the I-V Data: The current density J flowing through a tunnel junction at a low bias voltage V (eV < Φ) is expressed as where e is the electron charge and ℏ is the Dirac constant. [45] Assuming that a uniform current flows in the barrier region with width w and thickness t, the tunneling current I Simmons is expressed as Here, we fit the calculated I Simmons to the I-V data obtained in the range of 0 < V < 50 mV by adjusting d, Φ, and t so that these parameters give the minimum residual sum of squares, which is expressed as Preparation of the Back-Gate Structure of Device D: For device D, the two-terminal spin-valve device was prepared under the same process conditions as those used for device B. The back-gate electrode was formed by sputtering a 200-nm thick Al layer on the back of the STO substrate. The resistance between the LSMO electrodes and the back-gate electrode was as high as ≈10 12 Ω, confirming the insulation between the back-gate electrode and LSMO electrodes. The I-V curve and MR curve for device D are shown in Figure S12, Supporting Information. The normalized I-V data of device D are in perfect agreement with those of device B in the low-bias region, as shown in Figure S13, Supporting Information.
Analysis of Back-Gate Modulation in Device D: The sheet carrier density induced by the back-gate application is expressed as where is the dielectric constant of the STO substrate, V G is the applied back-gate voltage, and L is the thickness of the STO substrate. depends on temperature, and at 3 K, it is ≈20 000. [50] The carrier density N induced by the gate-voltage application is expressed as where t deviceD is the thickness of the conduction path in device D. By fitting the theoretical curve obtained with Simmons' equation to the data, t deviceD is estimated to be 0.2 nm for device D when no gate voltage is applied ( Figure S14, Supporting Information). Then, the change in the Fermi level in the channel ΔE is given by where k B is Boltzmann's constant and T is the measurement temperature, that is, 3 K. Then, ΔE is estimated to be 3.1 meV. As shown in Figure  S14, Supporting Information, by considering this value as the change in the tunnel barrier height, we can quantitatively reproduce the modulated tunnel current with Simmons' equation.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.