A High-Precision Gated Integrator for Repetitive Pulsed Signals Acquisition

Abstract

Gated integrating measurement method represents a widely used approach when fast, repetitive analogue signals are concerned. In this work a compact synchronized gated-integrator prototype has been realized and preliminary characterized. Front-end electronics is based on the mature high-precision switched-integrator transimpedance-amplifier IVC102 whose output is connected to a precision LT1991 inverting amplifier, whereas analogue-to-digital conversion, as well as timing control circuitry, are performed by a high-efficiency LPC845 microcontroller. Synchronizing signal detection with the external trigger generated in coincidence with a source, the proposed circuitry amplifies and integrates the signal only when the pulse is generated, displaying excellent performances in terms of linearity, sensitivity and signal-to-noise ratio. Hence, the proposed solution represents an affordable alternative to continuous-time regime measurement-techniques, usually adopted in radiation dosimetry where accuracy and sensitivity are strict requirements for treatment quality assurance.

1. Introduction

Gated integration represents an adequate approach for repetitive pulsed signal conditioning. In particular, a gated-integrator is able to synchronize signal detection to the external trigger generated in coincidence with a source having a repetition rate f_R. In a typical application there is a need of measuring short time signals with the possibility to open the acquisition window just around the signal occurrence. Gated integrator instruments can reach gate widths as low as dozens of picoseconds and, therefore, are used to process fast analogue signals. Widely employed in X-ray particles physics [1], they may be useful also for clinical apparatus using strongly ionization radiation for cancer treatment, like linear accelerators (LINACs).

Usually, in order to guarantee adequate accuracy, the measurement method employed in X-ray or fast excimer laser intensity diagnostics are based on the integration of the detector signal in a continuous time regime [2]. Moreover, despite its intrinsic optimized performance, a synchronized gated-integrating measurement method has not yet been applied in radiation dosimetry where repetitive intense pulsed radiations are employed [3]. For example, a LINAC apparatus used in radiotherapy treatments generates X-ray pulses having a duration from a few to a few tens of microseconds, with a repetition rate up to a few hundreds of Hz. Figure 1 shows an example of signal generated by a LINAC (Clinac iX, Varian Medical Systems, Inc., Palo Alto, CA, USA): for each packet, the rising edge of the electron current impinging onto the heavy-metal target and generating the X-rays pulses, occurs 12 µs (T_D) after the rising edge of synchronism signal and it is only 4 µs wide. For fast devices able to detect such X-ray sources [2,4], considering a typical maximum repetition rate of 360 Hz, a duty cycle as low as about 0.1% is found for the transduced current signal.

Electrometers used for dosimeter charge-signal acquisition integrate continuously in time, providing a measure of the absorbed dose with a relatively high number of impinging radiation pulses [5]. This operational procedure requires then periods of time where only noise signals, mainly sourced by electromagnetic interference (EMI) generated by the LINAC apparatus itself, are integrated, resulting in a non-optimized signal-to-noise ratio (SNR). Conversely, the synchronized-integration relies on the incoherent nature of noise to guarantee good performance in terms of SNR. Indeed, repeating measurements N times at f_R frequency, the signal contribution increases of a factor N, whereas stationary random noise accumulates proportionally to √N. Hence, for a truly repetitive input signal, averaging N samples will improve the SNR by a √N quantity, also assuring good performances in terms of precision and sensitivity [6,7,8,9]. In addition, when repetitive narrow pulsed signals are concerned, synchronized integration can be performed in a time interval just around the pulse, nulling the integrated noise contribution in the “dead time” between two pulses, hence increasing the SNR in comparison to a continuous-time measurement approach.

It has to be observed that the evolution in the radiotherapy field has led to the development of sophisticated techniques (such as intensity modulated radiation therapy, IMRT, and stereotactic body radiation therapy [10,11]) that provides for the use of appropriately-shaped narrow beams and turned along different angles. For these advanced techniques, detectors, with an active volume lower than 1 mm³ are required as an alternative to the common ionization chambers used in clinical dosimetry. Hence, in this field accurate dose measurements are necessary for the quality assurance required in treatment planes definition. In such a field, diamond is considered one of the best candidates for the realization of highly sensitive, radiation hard detectors [12]. In addition, due to its tissue equivalence [13], diamond would find application for IMRT monitoring [14,15], as well as for the fabrication of microdosimeters [16]. Within these contexts, a gated integrator (GI) appears to be an appropriate solution to meet the requirements of narrow pulsed signal conditioning. In this work the characterization of a compact GI prototype is illustrated, emulating the noisy conditions found in a real environment. Front-end electronics of the circuit is based on the mature high precision charge integrator IVC102 which shows excellent performances for low-level signal conditioning [17,18,19,20]. To acquire either sourcing or sinking input currents, integrator output is then connected to a LT1991 gain-selectable amplifier. Integrating highly-matched and low-thermal coefficient resistors, as well as a low noise op-amp, the LT1991 represents a good solution for one-chip precision amplifier realization. Analogue-to-digital conversion, system control and external interface are performed by an LPC845 microcontroller equipped with an ARM Cortex-M0+ processor. The LPC845 assures high power efficiency, to be applied for smart and portable equipment fabrication. The high versatile state configurable timer (SCT) used for measurement timing control allows to tail measurement parameters for the particular input conditions. Furthermore, a method able to drastically reduce offset errors induced by detector bias current is also discussed and verified, as well as non-ideality of charge transfer during hold and reset integrator switched phases. The main added values of the proposed prototype are compactness and cost effectiveness compared to instruments and methodologies typically adopted, for example, in the mentioned clinical dosimetry of fast X-ray pulses.

2. Circuit Description

Front-End Electronics and Integration Cycle

Figure 2 shows the schematic of the proposed gated-integrator prototype. The front-end electronics is based on the IVC102 high-precision switched integrator transimpedance amplifier (by Texas Instruments Inc., Dallas, Texas, USA). IVC102 chip integrates three high quality metal/oxide capacitors characterized by low leakage, excellent dielectric characteristics (typical non-linearity of ±0.005%) and temperature stability (±25 ppm/°C). They can be connected to obtain an integration capacitance of 10 pF, 30 pF, 40 pF, 60 pF, 70 pF, 90 pF or 100 pF. IVC102 output has been coupled to a gain-selectable amplifier LT1991 (by Texas Instruments Inc., Dallas, Texas, USA) configured as inverting amplifier whose non-inverting input is biased properly in order to measure both sinking and sourcing currents. Indeed, the LT1991 internal highly-matched resistors are used to create a V_DD/4 voltage at op-amp non-inverting input to obtain, at IVC102 reset, a V_DD/2 output voltage, i.e., in the middle of the ADC-input dynamics. The LT1991 output voltage is digitally converted by the 12-bit successive approximation A/D converter integrated in the LPC845 microcontroller (by NXP Semiconductors, Eindhoven, The Netherlands).

A dual power supply voltage V_CC = ±15 V was used for both the IVC102 and the LT1991 ICs, whereas the microcontroller unit, hence its internal ADC, is supplied at V_DD = 3 V. Two Schottky diodes have been inserted to prevent any damage of the ADC input induced by voltages outside its V_DD − V_SS input dynamics. Figure 3 shows the realized prototype. The analogue front-end has been enclosed between two copper-clad boards connected to ground. An LPC845-BRK board was used for digital circuitry and the system was inserted in an aluminum box connected to line earth.

In principle, an integration measurement cycle starts by resetting the IVC102 output to 0 V, by closing its internal switch S2. Hence, the integration begins by opening S2 and closing S1, so the charge is transferred to the selected integration capacitor (10 pF for the most sensitive range as chosen for the characterization described in this work. Unused internal capacitor pins have been connected to analogue ground). The SCT integrated in the LPC845 microcontroller has been used to generate the control signals for the internal IVC102 S1 and S2 MOS switches, HOLD and RESET signals, respectively. Figure 4 shows an example of the performed reset-integration-hold phases. At t₁ the reset of integration feedback capacitor C_INT is removed (RESET high) and integration starts after a while, at t₂, closing S1 switch (HOLD low). Integration is maintained in the T_i = t₃ − t₂ time period: integrated charge is given by Q_INT = C_INT V_O expression, where V_O is the voltage acquired by the ADC. Although V_O of Figure 4a refers to IVC102 input left float, it has to be noted that T_i has been centred around the sync front edge at which the input signal is synchronized. V_O amplitude is maintained opening S1 at t₃, and an A/D conversion can be performed. Finally, S2 is closed at t₄ and a new cycle can start. The diagram in Figure 4a highlights the effect induced by internal MOS switches commutations. In particular, due to charge transfer during MOS S1 commutations, two ∆V_Q voltage steps of few mV, equal in amplitude but opposite in sign, are observed at the start and at the end of the integration period. Therefore, to zero any A/D conversion errors greatly reducing accuracy for low level signals, the charge integration result is measured as the voltage difference between the value V_A acquired before (pre-hold phase) and the value V_B acquired after the integration period (hold phase). It is worth to observe that when the IVC102 input is connected to a source (as the test fixture used for circuit characterization described in the following section), a charge transfer asymmetry is found, due to the unavoidable additional capacitance inserted at the integrator input. In this case, also the mentioned V_B − V_A differential measurement is not able to guarantee an adequate measurement accuracy. Figure 4b illustrates such an effect: for the adopted connection, the absolute value of voltage step when S1 is closed is greater than that when the switch is reopened. In such a case, the V_B − V_A quantity contains an unpredictable offset error related to the particular capacitance value of the cable/device connected at the integrator input.

In commercially-available boxcar units [21] it is possible to perform a second acquisition with the same window length to suppress the noise baseline. In fact, a similar approach is also used for low level signals in CMOS image sensors. Such technique called CDS (correlated double sampling) removes the noise by differencing sampled values taken from the same pixel before and immediately after the measurement onto similar capacitances. Hence, in our case to cancel measurement error due to charge-transfer asymmetry, mostly affecting precision at the lowest input levels, for GI prototype signal acquisition has been doubled: one measurement is synchronized with the sync signal front-edge; a second acquisition is performed in the time interval between two pulses. The asymmetry of charge transferred during switch commutations is counterbalanced by calculating the result of the measurement as the difference between the voltage (V_B − V_A) acquired when the pulse is present and the differential voltage (V_B0 − V_A0) acquired during “zero-measurement” (pulse absent).

An SCT peripheral integrated into the LPC845 microcontroller allows advanced timing control operations with or without a small CPU intervention, as well as supporting user-defined events and states based on external signals or on match conditions. In our case the SCT was used as a 32-bit up-counter timer, with a clock frequency f_CK of 30 MHz, to manage six events in order to generate the switches control signals synchronized to the input sync signal. A sketch of the timing diagram adopted for the GI prototype is reported in Figure 5. Event EV0 is generated when the rising edge of the sync signal arrives. At every occurrence of event EV0, SCT has been programmed to automatically capture into the Cap[0] register the timer-counter value and then resets the timer-counter register itself. At start-up (not shown in the figure), i.e., during the first cycle, SCT allows to have a precise measure (ideally within 33 ns at f_CK = 30 MHz) of period T between two successive sync pulses, in our experiments fixed to about 2.778 ms (360 Hz of pulse repetition rate).

Match[5] register is then loaded with the calculated T/2 value (around 1.389 ms) in order to add event EV5 used to perform the mentioned “zero-measurement” in the following cycles. EV5 also resets the timer counter. After such a start-up first cycle, in periodic regime, capture on EV0 represents a measure of a “new” T/2 value, whereas the overall time period T between two pulses is updated as the sum of previous Match[5] content and actual Cap[0] quantity. A new T/2 value is then calculated and stored in the Match[5] register to be used for the next cycle. The other four events (EV1–EV4) determine a symmetric integration time interval around the signal pulse and the microcontroller performs A/D conversions in the two pre-hold and hold periods.

Table 1. Match values related to EV1-EV5 events calculated as a function of measurement parameters T_i, T_D, and T_C, and the measured T value (see text).

Event	Match Register	Equations	Match Values (µs)	Match Register Content (Clock Counts)
EV5	Match[5]	T/2 ← {Cap[0] + Match[5]}/2	1388.9	41667
EV1	Match[1]	Ti /2 + TD	62.0	1860
EV2	Match[2]	Ti/2 + TC + TD	112	3360
EV3	Match[3]	T/2 − (Ti/2 + TC) + TD	1300.9	39027
EV4	Match[4]	T/2 − Ti/2 + TD	1350.9	40527

reports equations and match values, both in µs and SCT clock counts, generating EV1-EV5 events. Values are calculated for an integration time T_i = 100 µs, an ADC acquisition/processing time T_C = 50 µs, a time delay between the pulse signal arrival and the sync front edge T_D = 12 µs, and assuming for T the nominal 2777.8 µs value. Obviously, Match[1] and Match[2] values do not depend on the particular measured period, whereas Match[3], Match[4], and obviously Match[5] contents are a function of the actual T measurement.

3. Circuit Characterization

3.1. Experimental Setup

Figure 6 illustrates the setup adopted for the GI prototype characterization. A test fixture has been realized to emulate the presence of a real detector generating repetitive current pulses 10 µs wide in the 1 nA–3 µA range (i.e., 10⁻¹⁴–3 × 10⁻¹¹ C) immersed in a noisy environment. Additive white noise (at a bandwidth 10 MHz, amplitude greater than 10 mV_PP), provided by an Agilent 33220A waveform generator, is superimposed to the pulsed signal via a 1 MΩ resistor. Both circuit prototype and test fixture have been enclosed in aluminum boxes connected to line–earth in order to reduce unintentional external EMI contributions. A Keithley 6221 AC/DC precision current source was used to generate controlled and repeatable charge packets. The GI integrator input sync was connected to the 6221 trigger out. For circuit characterizations, a square wave at 360 Hz with 0.36% of duty cycle has been used to source 10 µs wide current pulses.

Figure 7a shows an example of generated repetitive current pulses. Signal has been acquired by an oscilloscope (Agilent, DSO-X 3024A) as the output voltage difference across a 3900 Ω resistor. Moreover, Figure 7b shows the resulting 1 µA_pp current pulse with the maximum addition of white noise signal in our test.

A differential measurement method previously described allows to ideally counterbalance any error induced by offset originated by continuous bias current of a detector connected at the integrator input. Figure 8 illustrates the time diagram observed when injecting a 10 nA DC current superimposed to 1 µA_pp pulses. To highlight the effect, the integration period has been fixed to 1 ms. The slope of V_O curves during the half period in which the pulse is absent is equal to that observed in presence of the pulse. Hence, according to the equation reported in the figure, signal conversion is not affected by any offset errors since (V_B − V_A) − (V_B0 − V_A0) amplitude only depends on the ΔV voltage step induced by input pulse.

3.2. Characterization Results

Gated integration, relying the incoherent nature of noise components, allows to increase the signal to noise ratio of a repetitive input signal. As pointed out in the introduction, a SNR increase as N^1/2 would be obtained repeating signal integration and averaging N samples. By means of the setup indicated in the previous paragraph, a preliminary circuit characterization was performed to verify such a behaviour. A 100 nA constant current (sourced by Keithley 6221) was injected in the input. Note differential “zero-measurement”, which would have given null results, was disabled. White noise signal was added via an Agilent 33220A waveform generator set for a 50 mV_pp amplitude. Figure 9 reports data of the performed characterization (T_i = 60 µs). In particular, for each N, SNR values have been estimated as the ratio between the mean value of ADC output and the observed standard deviation. Recorded values fairly reproduce the expected SNR ~ N^1/2 (dotted line).

Designed for pulsed signal conditioning, the circuit was then characterized injecting 10 µs-wide current pulses in the 1 nA–3 µA interval in order to generate charge packets in the range 0.01–30 pC. As indicated by data reported in Figure 10a, obtained as mean value of 512 pulses acquisition (N = 512) with an integration time period of 40 µs, the system shows excellent linearity over more than three decades of the impinged charge packets. In order to quantify the linearity error, we calculated the residuals between experimental ADC values and the linear fit straight line of data in Figure 10a. Figure 10b shows that the absolute value of the residuals is lower than 0.4%.

To demonstrate the effectiveness of the implemented measurements method, Figure 11 reports data obtained for input charge packets in the lowest range of tenths of pC without performing any measurement in the time period between two pulses (“zero-measurement” described in the previous paragraph). It is worth to mention that the non-linearity error is now greater than 5%, highlighting the effectiveness of the implemented differential acquisition method to null any offset contribution. It is pointed out here that compensation errors, such as the asymmetric MOS switch charge transfer, are induced by the unavoidable presence of a bias current.

One key advantage of the realized GI prototype synchronized to a source is the possibility to reduce integration to a time period tailored on the input pulse width. Therefore, the method would guarantee good performance in SNR terms in comparison to the measurements usually performed in a continuous time regime. To verify how noise influenced the acquisitions in the realized prototype, we performed measurements as a function of integration time T_i for different noise amplitudes. In particular, 10 pC charge packets sourced by a Keithley 6221 generator (set to generate a square wave of 1 µA_pp amplitude, a frequency f_R = 360 Hz, and a duty cycle of 0.36%) were injected into the GI input by means of the test fixture of Figure 6. During the measurements, the signal was kept constant, whereas the noise amplitude was increased from 3% to 50% of the peak signal, i.e., an SNR in the 20–50 dB range. Similarly, to what done for characterizations reported in Figure 10 and Figure 11, the microcontroller unit calculated the mean value $\overline{q}$ of N = 512 successive input pulses, as well as the variance according to:

$${\sigma }_q{}^2=\frac{1}{N}{{\displaystyle \sum }}_1^N{\left(q_i-\overline{q}\right)}^2=\frac{1}{N}{{\displaystyle \sum }}_1^N{q}_i{}^2-{\left(\frac{1}{N}{{\displaystyle \sum }}_1^N{q}_i\right)}^2$$

where q_i represents the ith acquired charge pulse (in ADC counts). The acquisition of N samples was repeated 32 times in order to evaluate both q and σ_q² dispersions (however displaying changes within the resolution of data reported in this work). The data in Figure 12 refer to the measured variance σ_q² as a function of T_i between 40 µs and 1 ms. The results clearly display the expected linear behaviour of σ_q² on the integration time period when white noise is concerned (see Appendix A) [6,22]. Moreover, as also expected, curves referring to different noise amplitudes are scaled as the power of input noise itself (as also indicated by Equation (6) reported in Appendix A). The experimental data clearly indicate that best results are gained at the lowest integration period, highlighting the effectiveness of synchronized gated-integration in drastically reducing the detrimental effect due to a noisy environment.

To underline the good performance of the implemented system, we also compared the results acquired by the GI prototype to those furnished by a high-performance Keithley 6517A electrometer. Comparison has been performed with the same 10 pC input pulse repetitive signal used for data reported in Figure 12 and the results are summarized in

Table 2. Noise performances of gated integrator circuit (Ti = 40 µs) and a Keithley 6517A electrometer for 10 pC, 10 µs wide, input charge pulses sourced by an AC/DC current source (Keithley 6221) injected by means of the test fixture illustrated in Section 2.

SNR (dB)	Keithley 6517A (nA)	rdg err	ADC Mean Value	rdg err
46	3.65 ± 0.05	±1.4%	1344.6 ± 1.2	±0.09%
40	3.66 ± 0.05	±1.4%	1344.5 ± 1.8	±0.13%
34	3.68 ± 0.05	±1.4%	1345 ± 3	±0.22%
28	3.70 ± 0.05	±1.4%	1345 ± 6	±0.44%
22	3.61 ± 0.13	±3.6%	1346 ± 12	±0.89%

. For the GI prototype, T_i was set to 40 µs. Error values were calculated as the difference between the maximum and the minimum of the recorded values during 30 s of observation and reported in the columns of Table 2 also as the percentage on the average quantity. The Keithley electrometer was set into current measurement mode. For each value of the injected noise, the relative measurement was enabled in order to null the contribution of the offset current induced by noise source (~1 nA). Compared to the expected 3.6 nA (1 µA × 0.36%) value, the electrometer displayed highly dispersive results on the average current, ranging from 3.61 nA to 3.70 nA, strongly dependent on the noise amount. The percentage error of the results, mostly within 1.4%, becomes 3.6% at the highest noise amplitude (SNR ~20 dB). Conversely, for the same input conditions, data acquired by the GI prototype were highly stable, with an average n value between 1345 and 1346. It is worth noting that such results correspond to an input charge pulse amplitude of:

Q = N V_DD C_INT/2¹² = 10.18 pC

where for C_INT has been used the nominal 10 pF value, whereas the V_DD measured 3.1 V. The reading error was significantly lower than that observed for the electrometer, spanning 0.09%–0.89%.

4. Concluding Remarks

By exploiting the excellent performances of commercially available components, a compact and high-precision gated integrator prototype has been realized and characterized. The system has been mainly thought for conditioning and acquisition of repetitive input pulsed signals in which a sync trigger is provided. In such a context, timing circuitry, based on versatile state configurable timer embedded into the microcontroller (also used for signal acquisition and processing) was designed to synchronize the integration period to the source sync signal, as well as to easily adapt measurements on the pulse width, assuring the highest SNR and sensitivity. In addition, by adopting a differential two phases acquisition standard procedure, measuring the signal also within the time period between two consecutive pulses, we greatly reduced the offset induced by unavoidable asymmetric charge transfer during MOS switch commutation induced by the particular value of detector/connection-cable capacitances, as well as offset errors due to bias currents.

Experimental results demonstrated excellent performance of the proposed circuit in terms of linearity in the 10 fC–30 pC range for 10 µs width by using an integration time period of 40 µs centred around each pulse. A non-linearity relative error lower than ±0.4% has been achieved over more than three order of magnitude. Circuit characterization has been also performed emulating a real noisy environment usually found when fast pulsed sources are involved. Compared to results provided by an unsynchronized precision current meter, as usually adopted for pulse signals acquisition, proposed GI prototype demonstrated excellent performance with data dispersed only within less than 1% when peak-to-peak noise is comparable to the input pulses amplitude. Furthermore, investigations of prototype performances have been compared between both industrial and specifically-designed laboratory research gated integrator systems in

Table 3. Comparison of performances of gated integrator systems found in scientific literature and commercial webpages (see references reported in the first column).

Input Type	Repetition Rate	Input Range		Baseline Supp.	Linearity	Resolution	Channels
	Max	Min	Max
Charge [23]	100 Hz/channel	0.1 pC	1 nC	Yes	N.A.	0.03 pC	32
Charge [this work]	20 kHz 1	0.01 pC	33 pC 2	Yes	±0.05% FSR	0.01 pC	1
Current [24]	20 kHz	1 nA	100 µA	No	±0.1% FSR	Analogue output	2 - 16
Voltage [21]	600 MHz	10 mV	1.5 V	Yes	N.A.	12 bit	2
Voltage [25]	20 kHz	−2 V	+2 V	Yes	N.A.	N.A.	1
Voltage [6]	2 MHz	−2 V	+2 V	No	±3%	12 bit	1

1 Evaluated by pre-hold, integration period, hold, settling time and ADC conversion period (see Figure 4). ² ±16.5 pC in bipolar mode (Vo = V_DD/2 at RESET).

.

It has to be observed that commercially available systems are mainly developed for voltage inputs. Moreover, our prototype shows higher resolution when compared to the other current/charge input systems. Industrial systems designed for ultrafast-narrow input pulses provides the possibility of extremely low gate opening times, reaching repetition rates in the GHz regime. On the other hand, added values of the circuit proposed in this work are compactness, cost effectiveness and versatility and it would find application for pulsed sources diagnostics where adequate accuracy is required, as in X-rays dosimetry for radiotherapy. In such a context, work is currently in progress to evaluate the long-term stability and temperature dependence of the proposed circuit, as well as to test it in a real clinical environment.