Importance of Solvent Evaporation Temperature in Pre-Annealing Stage for Solution-Processed Zinc Tin Oxide Thin-Film Transistors

Abstract

We focused on the importance of solvent evaporation governed by the temperature of the pre-annealing stage (T_S) in solution-processed zinc tin oxide (ZTO) thin-film transistors (TFTs). We controlled T_S based on the boiling point (B_P) of the solvent used. When T_S reaches the B_P, the field effect mobility is found to be about 1.03 cm2/V s, which is 10 times larger than the T_S < B_p case (0.13 cm²/V s). The reason is presumed to be that residual organic defects are effectively removed as T_S increases. In addition, when Ts is beyond Bp, the mobility is rather decreased due to structural defects such as pores and pinholes. Based on our results, it is noted that T_S plays a significant role in the enhancement of electrical performance and stability of solution-processed ZTO TFTs.

1. Introduction

Amorphous oxide semiconductors (AOSs) are gaining attention as replacement materials for silicon, which is currently used for manufacturing thin-film transistors (TFTs) of display back panels in the display industry [1,2,3,4]. The main carrier transport paths of Si comprise sp³ hybridized orbitals; owing to their high directivity, Si has low mobility (below 1 cm²/V s) in the amorphous phase. However, AOSs can have high mobility even in the amorphous phase because the widely spread spherical metal ns orbitals overlap with each other to form a carrier transport path [5]. Furthermore, AOSs have a wide bandgap and are transparent in the visible light region; consequently, transparent displays can be efficiently realized using these materials [6]. Owing to these characteristics, AOSs are recognized as important materials for fabricating flexible and transparent displays. Thus far, the most studied AOSs are indium-based AOSs, such as InGaZnO and InZnO [7]. However, because In is an expensive rare metal, new materials must be introduced to reduce the cost of oxide semiconductor applications [8]. Zinc tin oxide (ZTO), which is a promising material for indium-free AOSs, has recently been actively studied [9]. However, more studies are required for commercialization compared to those of indium-based oxide semiconductors. Therefore, ZTO was selected as the material for this study.

TFTs are typically produced in industry using a vacuum process, which requires a vacuum environment. Most of the equipment used in the vacuum process is expensive and incurs considerable costs to enlarge the area of the products. The use of solution process is garnering interest as an effective strategy to address these shortcomings [10,11]. Unlike the vacuum process, which requires vacuum conditions, the solution process deposits a thin film by coating a solution formed by dissolving a metal precursor at room temperature and atmospheric pressure. The deposition methods used in the solution process include spin coating [12], inkjet printing [13], and spray coating [14]. The solution process has the advantages of being straightforward, affordable, and easy to use to fabricate large-area products. However, the products fabricated using the solution process have drawbacks in terms of performance and stability compared to the devices fabricated via a vacuum process [11,15]. One reason for these limitations is that solvents are essential for solution processing. The solvent evaporation during thermal annealing can create structural defects, such as pores and pinholes. The solvent may be present as an organic residue inside the thin film. These defects deteriorate the performance and reliability of a device [16]. Therefore, suppressing solvent-related defects is crucial for the commercialization of solution-processed oxide electronics. In the solution process study for AOS TFTs, pre-annealing stages (also referred to as drying, soft baking, etc.) are included for the smooth removal of the solvent. However, the pre-annealing stage has received relatively less attention compared to the main annealing stage, which is generally called post-annealing or hard baking [17].

In this study, we fabricated ZTO TFTs pre-annealed at different temperatures and investigated the changes in the device characteristics according to the pre-annealing temperature (T_S). Since the pre-annealing stage is significantly related to solvent evaporation, the temperature conditions were set as high temperature (220 °C), low temperature (room temperature), and similar temperature (120 °C) based on the boiling point (B_P, 124 °C) of the solvent. Atomic force microscopy (AFM) results showed the influence of the T_S on the surface morphology and roughness of the thin film. The chemical configurations of the thin films were investigated using X-ray photoelectron spectroscopy (XPS). Parameters such as mobility and subthreshold swing (SS) were extracted from the transfer curves of the ZTO TFTs. The influence of the T_S was confirmed based on the physical and electrical properties of the device.

2. Materials and Methods

First, tin chloride dihydrate (Sigma Aldrich, St. Louis, MO, USA) and zinc chloride (Sigma Aldrich, St. Louis, MO, USA) were dissolved in 2-methoxyethanol (2-ME, Sigma Aldrich, St. Louis, MO, USA) in a 6:4 molar ratio to synthesize a ZTO precursor solution with a concentration of 0.17 M. The ZTO precursor solution was stirred at room temperature for approximately 2 h. All devices were manufactured using the same solution. SiO₂/p-Si substrates were sonicated in acetone, isopropyl alcohol, and deionized water for 5 min each to clean the substrates. They were then heated on a hot plate for approximately 5 min to remove the water and residue after being blown with nitrogen. The ZTO thin film was spin-coated onto a Si substrate at 4000 rpm for 20 s. Pre-annealing was performed at room temperature (RT), 120 °C, and 220 °C, respectively, for 30 min on the hotplate (SMHS-3, DAIHAN Scientific, Wonju-si, Korea). T_S was precisely determined using the infrared thermometer (Kiray 200, Kimo Instruments, Mumbai, India). To minimize the change in conditions except for Ts, the pre-annealing stage was performed at controlled humidity (~20%) and air temperature (20 °C) inside a fume hood. After the pre-annealing stage, post-annealing was performed in a tube furnace at 430 °C for 30 min. A source–drain electrode was deposited on the annealed ZTO thin film using a thermal evaporator. The source–drain electrode was composed of 50-nm-thick aluminum. Finally, the devices were stabilized via heat treatment at 120 °C under low vacuum (10⁻² Torr) for 30 min. Figure 1 shows a schematic of the manufacturing process of the solution-processed ZTO devices. The SiO₂ dielectric thickness, channel length, and channel width of the ZTO TFTs with the bottom-gate top-contact structures were 100 nm, 100 μm, and 1000 μm, respectively.

AFM (NX20, Park Systems, Suwon-si, Korea) was used to measure the surface morphology and roughness of the ZTO thin films. XPS (NEXSA, Thermo Fisher, Waltham, MA, USA) was used to confirm the change in the chemical composition of the ZTO thin films according to the T_S. The electrical characteristics of the ZTO TFTs, such as the transfer curve and stability under positive bias stress (PBS), were measured in air using a probe station (T-4000A, MS Tech, Seoul, Korea). To examine the transfer characteristics of the devices, drain current (I_D) was measured while increasing the gate voltage (V_G) from −20 to 30 V by 0.5 V and fixing the drain voltage at 30 V. For the PBS test, a positive gate bias (V_G = 20 V) was applied for up to 1000 s, and the transfer characteristics of the device were measured.

3. Results and Discussion

Figure 2 shows AFM three-dimensional images (8 μm × 8 μm) of the ZTO thin films pre-annealed at different temperatures. The root-mean-square values of the surface roughness (R_q) of the ZTO thin films pre-annealed at RT, 120 °C, and 220 °C were 0.148, 0.157, and 0.377 nm, respectively. The R_q of the ZTO thin film pre-annealed at 220 °C was more than twice as high and exhibited a rougher surface. In particular, the surface morphology (Figure 2c) of the thin film pre-annealed at 220 °C demonstrated a significant difference from that of the thin films pre-annealed under the other T_S. In Figure 2c, micrometer-sized pores are clearly observable, and large fluctuations on the surface are confirmed. This is presumed to be the result of the rapid evaporation of the solvent inside the as-deposited thin film during the pre-annealing stage. A large amount of solvent was present inside the thin film immediately after spin-coating. Actually, it is well known that solution-processed thin films suffer from film porosities such as pinholes and pores created by evaporation and volatilization of residual solvent during annealing. [18] When pre-annealing is performed at a temperature considerably higher than the solvent B_P (124 °C in the case of 2-ME), evaporation occurs not only on the surface of the thin film but also deep inside it. This creates structural defects, such as pores or pinholes. In the case of thin films pre-annealed at RT (Figure 2a) and 120 °C (Figure 2b), the physical damage to the thin films may be considerably lower because the solvent slowly evaporates on the surface of the thin films. The rough surface of AOS thin films causes surface roughness scattering and reduces the carrier mobility [19]. The surface roughness scattering effect becomes stronger as the thin film thickness decreases, such as in the case of the ZTO thin film used in this experiment [20]. The structural defects of thin films, such as pores and pinholes, also reduce mobility owing to interference with carrier transport, and deteriorated stability under gate bias conditions by acting as traps.

XPS was used to analyze the change in the configuration of the chemical bonds of the ZTO thin films according to the T_S. Figure 3a–c show the O 1s XPS spectra of ZTO thin films pre-annealed at RT, 120 °C, and 220 °C, respectively. The O 1s peaks were deconvoluted into three subpeaks centered at 530 ± 0.1, 531 ± 0.1, and 532 ± 0.1 eV using Gaussian distributions [21]. The subpeak at the lowest binding energy of 530 ± 0.1 eV (O_L) is related to metal–oxygen bonding. The subpeak at the medium binding energy of 531 ± 0.1 eV (O_M) is related to oxygen vacancy. The subpeak at the highest binding energy of 532 ± 0.1 eV (O_H) is related to impurity-related oxygen, such as metal hydroxide or metal oxide–carbon groups [22]. The O_L subpeak ratios (O_L/O_total) of the ZTO thin films pre-annealed at RT, 120 °C, and 220 °C were 72.0%, 75.3%, and 69.2%, respectively. The highest O_L sub-peak ratio was observed for the ZTO thin film pre-annealed at 120 °C. The higher metal–oxygen bonding ratio for AOS thin films implies fewer oxygen-related defects and better carrier transport properties. The highest O_M subpeak ratio (O_M/O_total) was 24.4% for the ZTO thin film pre-annealed at 220 °C. The O_M sub-peak is mainly attributed to oxygen vacancies, and structural defects in oxide thin films also contribute to it [23]. Oxygen-related defects, such as oxygen vacancies, may have increased owing to these structural defects [22,23]. Therefore, as confirmed via AFM analysis, this result shows that the ZTO thin film pre-annealed at 220 °C had many structural defects, such as pores. Although there was no significant difference in the O_H sub-peak ratio (O_H/O_total), it was relatively high in the ZTO thin film pre-annealed at RT compared to that annealed at other temperatures. The relatively high O_H sub-peak intensity may be attributed to the presence of organic solvent residues.

Figure 3d–f show the C 1s XPS spectra of the ZTO thin film pre-annealed at RT, 120 °C, and 220 °C, respectively. The C 1s peaks were deconvoluted into four subpeaks centered at 284.4, 285.9, 287.3, and 289.4 eV, which were attributed to C–C/C–H, C–O, C=O, and O–C=O, respectively [24]. The intensity of the C 1 peak was considerably higher in the ZTO thin film pre-annealed at RT than that of the films obtained at other temperatures. This is speculated to be related to the impurity-related carbon originating from the remaining organic solvent that is not sufficiently eliminated in the thin film when the pre-annealing stage is performed at a temperature considerably lower than the B_P of the solvent. The XPS results suggest that the quality of ZTO thin films is best when the pre-annealing stage is performed at 120 °C, which is slightly below the B_P of 2-ME used as the solvent.

Figure 4a–c show the transfer curves of ZTO TFTs pre-annealed at different temperatures (RT, 120 °C, and 220 °C) for 30 min. All devices exhibited saturation behavior at a drain voltage of 30 V, which was confirmed by the output characteristics. The threshold voltage (V_T) was obtained from the extrapolation of a square root of I_D -V_G curve. The μ_sat and SS values of the devices were extracted using Equations (1) and (2), respectively.

$${\mu }_{sat}=\frac{2L}{W{C}_{ox}}{\left(\frac{\partial \sqrt{I_D}}{\partial V_G}\right)}^2$$

(1)

$$SS={\left(\frac{d\log \left(I_D\right)}{d{V}_G}\right)}^{-1}$$

(2)

where W, L, C_ox, I_D, and V_G denote the channel width, channel length, and SiO₂ dielectric capacitance, respectively, per unit area. The μ_sat values of the ZTO TFTs pre-annealed at RT, 120 °C, and 220 °C were 0.13 × 10⁻⁴, 1.01 × 10⁻⁴, and 0.31 × 10⁻⁴ m²/(V·s), respectively. The ZTO TFT pre-annealed at RT exhibited the lowest μ_sat value. The SS values of the ZTO TFTs pre-annealed at RT, 120 °C, and 220 °C were 2.02, 0.55, and 0.86 V/dec, respectively. The devices pre-annealed at 120 °C showed good SS, but the devices pre-annealed at 220 °C demonstrated relatively poor SS. The devices pre-annealed at RT exhibited the highest SS values. The semiconductor/gate dielectric interface trap density (N_it), which is closely related to SS, was extracted using Equation (3).

$${\mathrm{N}}_{\mathrm{it}}=\left(\frac{SSlog\left(e\right)}{kT/q}-1\right)\frac{C_i}{q}$$

(3)

where C_i, q, k, and T denote the capacitance per unit area of the gate dielectric, unit charge, Boltzmann constant, and the absolute temperature, respectively. The N_it of the ZTO TFTs pre-annealed at RT, 120 °C, and 220 °C were 7.09 × 10¹², 1.77 × 10¹², and 2.89 × 10¹² cm⁻², respectively. N_it value was the largest for the ZTO TFT pre-annealed at RT and the smallest for the ZTO TFT pre-annealed at 120 °C. As confirmed from the AFM and XPS results, if the T_S is very high (220 °C) compared to the B_P of the solvent, the organic residue originating in the solvent rapidly evaporates inside the thin films, creating structural defects, such as cavities and pores. These structural defects as charge-trapping sites will increase the trap density inside the thin film. Such trapped electrons would have little contribution to conductivity due to low kinetic energy. Moreover, the trap states filled with electrons will become negatively charged fixed states, thereby forming negative potential barriers. These negative potential barriers could induce the scattering of electrons. Therefore, structural defects may contribute to reduced mobility. [25] In contrast, if the T_S is very low (RT) compared to the B_P of the solvent used, more of the organic residue originating in the solvent will remain inside the thin film and act as a defect. The defects in the thin film interfere with the movement of electrons, reducing μ_sat and aggravating the SS by acting as trap sites. To examine the hysteresis (V_H = V_T,backward − V_T,forward), transfer curves were measured with a back-and-froth sweep setup. A clockwise hysteresis behavior was observed in all the transfer curves of the ZTO TFTs. The clockwise hysteresis behavior of oxide TFTs may be explained as the model of charge trapping at the semiconductor/gate dielectric interface [26]. V_H value was the largest for the ZTO TFT pre-annealed at RT and the smallest for the ZTO TFT pre-annealed at 120 °C. Based on the charge trapping model, the trend of the N_it value can explain the trend of the V_H value well. As the density of charges trapped at the interface increases, the effect of screening the electric field of the gate increases, eventually increasing V_H. In addition, the on–off current ratios (I_ON/I_OFF) of ZTO TFTs were also examined. The I_ON/I_OFF of the devices pre-annealed at 120 °C was about 20 times larger than of those at RT.

Table 1. Electrical parameters of solution-processed ZTO TFTs pre-annealed at different temperatures.

TS	μsat [m2/(V·s)]	SS [V/dec]	ION/IOFF	VH [V]	Nit [cm−2]
RT	0.13 × 10−4	2.02	2.5×105	4.2	7.09 × 1012
120 °C	1.01 × 10−4	0.55	5.6×106	1.0	1.77 × 1012
220 °C	0.31 × 10−4	0.86	6.0×105	2.2	2.89 × 1012

summarizes the electrical parameters extracted from the transfer curve in Figure 4. The results in Figure 4 indicate that the device performance is optimized when the T_S is similar to the B_P of 2-ME used as the solvent.

Figure 5a–c show the results of the PBS test of the ZTO TFTs pre-annealed under each T_S. The transfer curves and V_T values were measured after applying a gate bias stress of 20 V up to a maximum of 1000 s. Figure 5d is a graph comparing ΔV_T (V_{T, 1000s} − V_{T, 0s}) due to PBS according to T_S. The ΔV_T values were 17.2, 11.8, and 14.6 V at T_S of RT, 120 °C, and 220 °C, respectively. The ΔV_T of the device pre-annealed at 120 °C was the smallest, and the ΔV_T of the device pre-annealed at RT was the largest. Similar to the results in Figure 4, when the T_S is similar to the B_P of 2-ME used as the solvent, the stability under PBS is demonstrated to be relatively excellent. The instability of the device owing to the gate bias stress is explained using the defect creation model and charge trapping model [27]. In the defect creation model, stress increases in the device that receives gate bias, and trap sites are created inside the thin film, thereby deteriorating the SS and V_T shift. On the contrary, in the charge trapping model, carriers are trapped in the semiconductor/dielectric interface and bulk trap sites owing to gate bias stress. Closely resembling the charge trapping model of clockwise hysteresis behavior, the trapped carriers screen the electric field from the gate, shifting the transfer curve of devices parallelly without considerably reducing SS. The instability of ZTO TFTs used herein under PBS can be explained using the charge trapping model because the measured devices showed a negligible variation of SS under PBS except for fine SS changes in devices pre-annealed at RT. As thermally grown silicon dioxide is used as the gate dielectric, the effect of the charge trapped inside the gate dielectric layer could be ignored. Therefore, the trap density of the interface in the ZTO semiconductor layer will have a significant influence on the stability of the device under PBS. The trends of ΔV_T values in Figure 5 and N_it and V_H values in Figure 4 were in good agreement. The lowest N_it and V_H were observed in the device pre-annealed at 120 °C, and the ΔV_T value was the smallest. The highest N_it and V_H were detected in the device pre-annealed at RT, and the ΔV_T value was the largest. The device pre-annealed at 220 °C also showed the same trend. These facts are in good agreement with the charge trapping model. The larger the N_it, the more carriers are trapped, increasing the ΔV_T and V_H value by a screening effect of the gate electric field. In conclusion, the PBS test results in Figure 5 indicate that the trap site density of interface and the bulk of the ZTO thin film is affected by the T_S. The above conclusions of AFM, XPS, and the transfer characteristics support these results well.

4. Conclusions

In this study, solution-processed ZTO TFTs were fabricated under different temperature conditions during the pre-annealing stage, and their properties were investigated. The electrical properties of the ZTO TFTs pre-annealed at a T_S similar to the B_P of solvent were generally better than those annealed at other T_Ss. The electrical properties of the ZTO TFTs pre-annealed at very low or high T_S compared to the B_P of the solvent were poor. The AFM results revealed that the ZTO thin film pre-annealed at 220 °C has structural defects, such as pores and pinholes, due to the vigorous evaporation of the solvent. The XPS results showed that pre-annealing at RT did not sufficiently remove the organic residues inside the ZTO thin film. The remaining organic residues act as traps and obstructions, thereby deteriorating the performance and stability of the ZTO TFTs. The transfer characteristics and PBS test results of ZTO TFTs were in good agreement with the AFM and XPS results. In conclusion, this study revealed that the T_S may influence the property of solution-processed ZTO TFTs. Particularly, when Ts almost similar to the Bp of the solvent, various defects inside thin films can be minimized, and the performance of ZTO TFTs can be optimized.