Multiple patterning is the defacto manufacturing technology for today's advanced semiconductor devices. However, this technology is becoming limited by technical challenges including cost, resolution, overlay and defectivity. To address these challenges there is growing interest in post lithographic processes which can reduce the pattern feature size thereby effectively enabling increased resolution corresponding to low k1 imaging which is not available by single exposure schemes. In addition to increased resolution, these processes can also improve Process Window (PW), Line Width Roughness (LWR) and Critical Dimension Uniformity (CDU). In this paper, we describe our technical approaches to reducing the Critical Dimension (CD) of resist patterns especially on the most challenging layers. In the area of Bright Field (BF) imaging, we have successfully developed a Positive Tone Develop Trim (PTDT) material which effectively reduces the CD of 193nm immersion line/space (L/S) features generated by a conventional PTD process. To enable CD shrink of Dark Field (DF) features [trenches and contact holes (C/H)] as generated by a 193nm immersion Negative Tone Develop (NTD) process, we have developed a NTD Shrink (NTDS) material. Both PTDT and NTDS approaches are low cost spin on track based processes and are competitive with other approaches in terms of cost, controlled shrink amount, post shrink PW and pattern fidelity.