Soft Breakdown in Ultra-Thin Oxides

Abstract

An understanding of dielectric breakdown mechanisms is critical for continued oxide scaling. Although working transistors have been demonstrated with sub-2nm SiO₂ gate dielectrics, the manufacturability of such devices hinges on the reliability of the oxide. As oxides become thinner and operating voltages become lower, a fundamentally different mode of dielectric breakdown occurs. This has been called soft breakdown and is considered to be the formation of a small, localized tunneling path through a dielectric. For transistors with 2-nm gate oxides, threshold voltage and maximum transconductance are not affected by soft breakdown, implying that circuits may continue to operate after soft breakdown. The increase in gate current or voltage noise associated with soft breakdown is not a limiting factor for many applications. However, some cases will be shown in which soft breakdown does degrade device function.

In order to make comparisons of ultra-thin oxide quality, it is important to be able to reliably detect soft breakdown. J-ramp, a commonly used ramped-current measurement to determine oxide quality, is unable to detect soft breakdown in ultra-thin oxides. We will demonstrate the incorporation of noise measurements in a commercial J-ramp algorithm.