Decreasing of Dimensions of Planar Field-Effect Transistors by Using Native Inhomogeneities
In this paper we consider an approach to decrease dimensions of planar field-effect transistors in a semiconductor heterostructure. It has been formulated a recommendation to use inhomogeneity of heterostructure to increase the effect.
Keywords: DECREASING DIMENSIONS OF TRANSISTOR; FIELD-EFFECT TRANSISTOR; HETEROSTRUCTURE
Document Type: Research Article
Publication date: 01 December 2012
- Journal of Computational and Theoretical Nanoscience is an international peer-reviewed journal with a wide-ranging coverage, consolidates research activities in all aspects of computational and theoretical nanoscience into a single reference source. This journal offers scientists and engineers peer-reviewed research papers in all aspects of computational and theoretical nanoscience and nanotechnology in chemistry, physics, materials science, engineering and biology to publish original full papers and timely state-of-the-art reviews and short communications encompassing the fundamental and applied research.
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