Analysis of High Aspect Ratio through Silicon via (TSV) Diffusion and Stress Impact Profile during 3D Advanced Integration

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© 2014 ECS - The Electrochemical Society
, , Citation Larissa Djomeni et al 2014 ECS Trans. 61 219 DOI 10.1149/06103.0219ecst

1938-5862/61/3/219

Abstract

This article is related to the development of a protocol for the characterization of the behavior of high aspect ratio through silicon via (TSV) during advanced three dimension (3D) integration. The time-of-flight (TOF)-SIMS profile measurement along the sidewall of the TSV with advanced samples preparations is described. This technique allows studying the efficiency of a low temperature, 200°C metallorganic chemical vapor deposition (MOCVD) titanium nitride (TiN) film as a barrier to copper diffusion into silicon. Then the thermo-mechanical stresses induced by the TSV in the surrounding silicon were studied by micro-Raman spectroscopy. Different TiN films were studied according to subsequent plasma treatments and compared with a reference deposited by ionized physical vapor deposition (i-PVD). The thermal stress in the silicon was found to decrease as a function of distance from an isolated TSV. The iPVD and MOCVD TiN barrier involved a more compressive stress than non-plasma treated MOCVD TiN.

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10.1149/06103.0219ecst