Abstract
To enable low power consumption and the access speed increase,three dimensional packaging of semiconductor chips has beenproposed. In particular, a high-aspect ratio through silicon via(TSV)allows short chip to chip interconnection. 4 μm diameter and aspectratio of 7.5 via TSV has filled. The perfect via filling was achievedwithin 25 minutes with the increasing irev/|ion| ratios of periodicreverse pulse current waveform. In addition, we evaluatedproduced cuprous ion concentration during electrodeposition byusing rotating ring disk electrode(RRDE). From theelectrochemical measurement by RRDE, cuprous ion concentrationon the reactive surface was markedly increasing with theincreasing irev/|ion| ratios. At irev/|ion| ratio of large(irev/|ion| = 6.0), alarge amount of cuprous ion concentration produces during copperdissolution by reverse current and cuprous ion remain at the viabottom. High cuprous ion concentration at the via bottomaccelerate deposition at the via bottom and achieve bottom upfilling.