skip to main content
article

NANA: A nano-scale active network architecture

Published:01 January 2006Publication History
Skip Abstract Section

Abstract

This article explores the architectural challenges introduced by emerging bottom-up fabrication of nanoelectronic circuits. The specific nanotechnology we explore proposes patterned DNA nanostructures as a scaffold for the placement and interconnection of carbon nanotube or silicon nanorod FETs to create a limited size circuit (node). Three characteristics of this technology that significantly impact architecture are (1) limited node size, (2) random node interconnection, and (3) high defect rates. We present and evaluate an accumulator-based active network architecture that is compatible with any technology that presents these three challenges. This architecture represents an initial, unoptimized solution for understanding the implications of DNA-guide self-assembly.

References

  1. Ancona, M. G. 1996. Systolic processor designs using single-electron digital circuits. Superlattices and Microstructure 20, 4.Google ScholarGoogle Scholar
  2. Bachtold, A., Hadley, P., Nakanishi, T., and Dekker, C. 2001. Logic circuits with carbon nanotube transistors. Science 294 (Nov.), 1317--1320.Google ScholarGoogle Scholar
  3. Beckett, P. and Jennings, A. 2002. Toward nanocomputer architecture. In Proceedings of the 7th Asia-Pacific Computer Systems Architecture Conference. 141--150. Google ScholarGoogle Scholar
  4. Braun, E., Eichen, Y., Sivan, U., and Gdalyahu, B.-Y. 1998. DNA-templated assembly and electrode attachment of a conducting silver wire. Nature 391, 775--778.Google ScholarGoogle Scholar
  5. Burke, P. J. 2003. An RF circuit model for carbon nanotubes. IEEE Trans. Nanotech 2, 1, 55--58. Google ScholarGoogle Scholar
  6. Castro, M. and Liskov, B. 1999. Practical byzantine fault tolerance. In Proceedings of the 3rd USENIX Symposium on Operating Systems Design and Implementation. Google ScholarGoogle Scholar
  7. Campbell-Kelly, M. 1998. Programming the edsac: Early programming activity at the University of Cambridge. IEEE Annals History Compt. 20, 4, 46--67. Google ScholarGoogle Scholar
  8. Cui, Y. and Lieber, C. M. 2001. Functional nanoscale electronic devices assembled using silicon nanowire building blocks. Science 291 (Feb.), 851--853.Google ScholarGoogle Scholar
  9. Culbertson, W. B., Amerson, R., Carter, R. J., Kuekes, P., and Snider, G. 1996. The teramac custom computer: Extending the limits with defect tolerance. In Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. (Nov.). Google ScholarGoogle Scholar
  10. Dalal, Y. K. and Metcalfe, R. M. 1978. Reverse path forwarding of broadcast packets. Commun. ACM. 21, 12 (Dec.), 1040--1048. Google ScholarGoogle Scholar
  11. Dally, W. J. 1992. Virtual channel flow control. IEEE Trans. Parallel and Distributed Systems 3, 2 (Mar.), 194--205. Google ScholarGoogle Scholar
  12. DeHon, A. 2002. Array-based architecture for molecular electronics. In Proceedings of the 1st Workshop on Non-Silicon Computation (NSC-1) (Feb.).Google ScholarGoogle Scholar
  13. DeHon, A. 2003. Array-based architecture for FET-based, nanoscale eletronics. IEEE Trans. Nanotech. 2, 1 (Mar.), 23--32. Google ScholarGoogle Scholar
  14. Dürkop, V., Getty, S. A., Cobas, E., and Fuhrer, M. S. 2004. Extraordinary mobility in semiconducting carbon nanotubes. Nano Letters 4, 1, 35--39.Google ScholarGoogle Scholar
  15. Dwyer, C., Guthold, M., Falvo, M., Washburn, S., Superfine, R., and Erie, D. 2002. DNA functionalized single-walled carbon nanotubes. Nanotech. 13, 601--604.Google ScholarGoogle Scholar
  16. Dwyer, C. 2003. Self-Assembled Computer Architecture: Design and Fabrication Theory. PhD thesis, University of North Carolina, May. Google ScholarGoogle Scholar
  17. Dwyer, C., Vicci, L., Poulton, J., Erie, D., Superfine, R., Washburn, S., and Taylor, R. M. 2004. The design of DNA self-assembled computing circuitry. IEEE Trans. VLSI 12 (Nov.), 1214--1220. Google ScholarGoogle Scholar
  18. Dwyer C., Cheung, M., and Sorin, D. J. 2004. Semi-Empirical spice models for carbon nanotube FET logic. In Proceedings of the 4th IEEE Conference on Nanotechnology (Aug.).Google ScholarGoogle Scholar
  19. Dwyer, C., Johri, V., Patwardhan, J. P., Lebeck, A. R., and Sorin, D. J. 2004. Design tools for self-assembling nanoscale technology. Institute of Physics Nanotech. 15, 9 (Sept.).Google ScholarGoogle Scholar
  20. Dwyer, C., Poulton, J., Taylor, R., and Vicci, L. 2004d. DNA self-assembled parallel computer architectures. Nanotech. 1688--1694.Google ScholarGoogle Scholar
  21. Dwyer, C., Park, S. H., LaBean, T., and Lebeck, A. 2005. The design and fabrication of a fully addressable 8-tile DNA lattice. In Foundations of Nanoscience: Self-Assembled Architectures and Devices. 187--191.Google ScholarGoogle Scholar
  22. Fortes, J. B. 2003. Future challenges in vlsi system design. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI (Feb.), 5--7. Google ScholarGoogle Scholar
  23. Fountain, T. J., Duff, M. J. B., Crawley, D. G., Tomlinson, C. D., and Moffat, C. D. 1998. The use of nanoelectronic devices in highly-parallel computing systems. IEEE Transactions on VLSI Systems 6, 1, 31--38. Google ScholarGoogle Scholar
  24. Fuhrer, M. S., Nygard, J., Shih, L., Forero, M., Yoon, Y.-G., Mazzoni, M. S. C., Choi, H. J., Ihm, J., Louie, S. G., Zettle, A., and McEuen, P. L. 2001. Crossed nanotube junctions. Science 288 (Apr.), 494--497.Google ScholarGoogle Scholar
  25. Gayasen, A., Vijaykrishnan, N., and Irwin, M. J. 2005. Exploring technology alternatives for nano-scale FPGA interconnects. In Proceedings of the 42nd Annual Design Automation Conference (DAC-2005), (June). Google ScholarGoogle Scholar
  26. Glass, C. J. and Ni, L. M. 1992. The turn model for adaptive routing. In Proceedings of the 19th Annual International Symposium on Computer Architecture (May), 278--287. Google ScholarGoogle Scholar
  27. Goldstein, S. C. and Budiu, M. 2001. Nanofabrics: Spatial computing using molecular electronics. In Proceedings of the 28th Annual International Symposium on Computer Architecture (July), 178--191. Google ScholarGoogle Scholar
  28. Han, J. and Jonker, P. 2003. A defect- and fault-tolerant architecture for nanocomputers. Nanotech. 14 (Jan.), 224--230.Google ScholarGoogle Scholar
  29. Han, J., Gao, J., Qi, Y., Jonker, P., and Fortes, J. A. B. 2005. Toward hardware-redundant, fault-tolerant logic for nanoelectronics. IEEE Design & Test of Computers 22, 4 (Apr.), 328--339. Google ScholarGoogle Scholar
  30. Hazani, M., Hennrich, F., Kappes, M., Naaman, R. N., Peled, D., Sidorov, V., and Shvarts, D. 2004. DNA-mediated self-assembly of carbon nanotube-based electronic devices. Chemical Physics Letters 391, 389--392.Google ScholarGoogle Scholar
  31. Heath, J. R., Kuekes, P. J., Snider, G. S., and Williams, R. S. 1998. A defect-tolerant computer architecture: Opportunities for nanotechnology. Science. 280 (June), 1716--1721.Google ScholarGoogle Scholar
  32. Huang, Y., Duan, X., Cui, Y., Lauhon, L. J., Kim, K.-H., and Lieber, C. M. 2001. Logic gates and computation from assembled nanowire building blocks. Science 294 (Nov.), 1313--1317.Google ScholarGoogle Scholar
  33. Intanagonwiwat, C., Govindan, R., and Estrin, D. 2000. Directed diffusion: A scalable and robust communication paradigm for sensor networks. Mobile Comput. Networking, 56--67. Google ScholarGoogle Scholar
  34. Javey, A., Guo, J., Farmer, D. B., Wang, Q., and Wang, D., 2004. Carbon nanotube field-effect transistors with integrated ohmic contacts and high-K gate dielectrics. Nano Letters 3, 447--450.Google ScholarGoogle Scholar
  35. Johnson, D. B. and Maltz, D. A. 1996. Dynamic source routing in ad hoc wireless networks. In Mobile Computing, vol. 353. (Imielinski and Korth, eds.). Kluwer, Amstredam.Google ScholarGoogle Scholar
  36. Kim, H.-S. and Smith, J. E. 2002. An instruction set and microarchitecture for instruction level distributed processing. In Proceedings of the 29th Annual International Symposium on Computer Architecture (May). Google ScholarGoogle Scholar
  37. Kim, H.-S. and Smith, J. E. 2003. Dynamic binary translation for accumulator-oriented architectures. In Proceedings of the International Symposium on Code Generation and Optimization (CGO) 2003 (Mar.), 25--35. Google ScholarGoogle Scholar
  38. Kim, B. M., Brintlinger, T., Cobas, E., Fuhrer, M. S., Zheng, H., Yu Z., Droopad, R., Ramdani, J., and Eisenbeiser, K. 2004. High-performance carbon nanotube transistors on SrTiO3 Si substrates. Applied Physics Letters 84, 11, (Mar.).Google ScholarGoogle Scholar
  39. Lavington, S. H. 1978. The manchester Mark 1 and Atlas: A historical perspective. Communications of the ACM 21, 1, 4--12. Google ScholarGoogle Scholar
  40. Liu, D., Park, S.-H., Reif, J. H., and LaBean, T. H. 2004. Dna nanotubes self-assembled from TX tiles as templates for conductive nanowires. In Proceedings of the National Academy of Science 101, 3, 717--722.Google ScholarGoogle Scholar
  41. Martin, B. R., Dermody, D. J., Reiss, B. D., Fang, M., Lyon, L. A., Natan, M. J., and Mallouk, T. E. 1999. Orthogonal self-assembly on colloidal gold-platinum nanorods. Advanced Materials 11, 12 (Aug.), 1021--1025.Google ScholarGoogle Scholar
  42. McEuen, P. L., Fuhrer, M. S., and Park, H. 2002. Single-walled carbon nanotube electronics. IEEE Trans. Nanotech. 1, 1 (Mar.), 78--85. Google ScholarGoogle Scholar
  43. Niemier, M. T. and Kogge, P. M. 2001. Exploring and exploiting wire-level pipelining in emerging technologies. In Proceedings of the 28th Annual International Symposium on Computer Architecture, (July), 166--177. Google ScholarGoogle Scholar
  44. Niemier, M. T., Ravichandran, R., and Kogge, P. M. 2004. Using circuits and systems-level research to drive nanotechnology. In Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD) (Oct.), 302--309. Google ScholarGoogle Scholar
  45. Nikolic, K., Sadek, A., and Forshaw, M. 2002. Fault-tolerant techniques for nanocomputers. Nanotech. 13, 357--362.Google ScholarGoogle Scholar
  46. Oskin, M., Chong, F. T., and Chuang, I. 2002. A practical architecture for reliable quantum computers. IEEE Computer (Jan.), 79--87. Google ScholarGoogle Scholar
  47. Park, S. H., Pistol, C., Ahn, S. J., Reif, J. H., Lebeck, A. R., Dwyer, C. L., and LaBean, T. H. 2006. Finite-size, fully-addressable DNA tile lattices formed by hierarchical assembly procedures. Angewandte Chemie 45 (Jan.), 735--739.Google ScholarGoogle Scholar
  48. Patwardhan, J. P., Dwyer, C., Lebeck, A. R., and Sorin, D. J. 2004. Circuit and system architecture for DNA-guided self-assembly of nanoelectronics. In Foundations of Nanoscience: Self-Assembled Architectures and Devices. 344--358.Google ScholarGoogle Scholar
  49. Patwardhan, J. P., Dwyer, C., Lebeck, A. R., and Sorin, D. J. 2005. Evaluating the connectivity of self-assembled networks of nano-scale processing elements. In Proceeding of the IEEE International Workshop on Design and Test of Defect-Tolerant Nanoscale Architectures (NANOARCH '05), (May), 2.1--2.8.Google ScholarGoogle Scholar
  50. Schroeder, M. D., Birrell, A. D., Burrows, M., Murray, H., Needham, R. M., Rodeheffer, T. L., Satterthwaite, E. H., and Thacker, C. P. 1991. Autonet: A high-speed, self-configuring local area network using point to point links. IEEE Journal on Selected Areas in Communications 9, 8, (Oct.).Google ScholarGoogle Scholar
  51. Seeman, N. C. 1999. Dna engineering and its application to nanotechnology. Trends in Biotech 17, 437--443.Google ScholarGoogle Scholar
  52. Skinner, K., Carroll, R. L., Washburn, S., and Dwyer, C. L. 2005. Nanowire transistors, gate electrodes, and their directed self-assembly. In Proceedings of the 72nd Southeastern Section of the American Physical Society (SESAPS) (Nov.).Google ScholarGoogle Scholar
  53. Snider, G., Kuekes, P., and Williams, R. S. 2004. CMOS-like logic in defective, nanoscale crossbars. Nanotech. 15, 881--891.Google ScholarGoogle Scholar
  54. Stan, M. R., Franzon, P. D., Goldstein, S. C., Lach, J. C., and Ziegler, M. M. 2003. Molecular electronics: From devices and interconnect to circuits and architecture. In Proc. IEEE. 91, (Nov.), 1940--1957.Google ScholarGoogle Scholar
  55. Strano, M. S., Dyke, C. A., Usrey, M. L., Barone, P. W., Allen, M. J., Shan, H. W., Kittrell, C., Hauge, R. H., Tour, J. M., and Smalley, R. E. 2003. Electronic structure control of single-walled carbon nanotube functionalization. Science 301 (Sept.), 1519--1522.Google ScholarGoogle Scholar
  56. Tans, S. J., Verschueren, A. R. M., and Dekker, C., 1998. Room-temperature transistor based on a single carbon nanotube. Nature 393, 49--52.Google ScholarGoogle Scholar
  57. Tennenhouse, D. L. and Wetherall, D. J. 1996. Towards an active network architecture. Computer Communication Review 26, 2. Google ScholarGoogle Scholar
  58. Thaker, D. D., Impens, F., Chuang, I. L., Amirtharajah, R., and Chong, F. T. 2005. Recursive tmr: Scaling fault tolerance in the nanoscale era. IEEE Design & Test of Comput. 22, 4 (Apr.), 298--305. Google ScholarGoogle Scholar
  59. Tour, J. M. 2000. Molecular electronics. Synthesis and testing of components. Accounts of Chemical Research 33, 11, 791--804.Google ScholarGoogle Scholar
  60. Tseng, G. Y. and Ellenbogen, J. C. 2001. Toward nanocomputers. Science 294 (Nov.), 1293--1294.Google ScholarGoogle Scholar
  61. Berkel, K. V. and Bink, A. 1996. Single-track handshake signaling with application to micropipelines and handshake circuits. In Procceding of the Seconds International Symposium on Advanced Research in Asynchronous Circuits and Systems. (Mar.), 122--133. Google ScholarGoogle Scholar
  62. Wind, S. J., Appenzeller, J., Martel, R., Derycke, V., and Avouris, P. 2002. Vertical scaling of carbon nanotube field-effect transistors using top gate electrodes. Applied Physics Letters 80 (May), 3817--3819.Google ScholarGoogle Scholar
  63. Winfree, E., Liu, F., Wenzler, L. A., and Seeman, N. C. 1998. Design and self-assembly of two-dimensional DNA crystals. Nature 394, 539.Google ScholarGoogle Scholar
  64. Yan, H., LaBean, T. H., Feng, L., and Reif, J. H. 2003a. Directed nucleation assembly of barcode patterned DNA lattices. Proceedings of the National Academy of Sciences 100, 14 (July), 8103--8108.Google ScholarGoogle Scholar
  65. Yan, H., Park, S. H., Finkelstein, G., Reif, J. H., and LaBean, T. H. 2003b. DNA templated self-assembly of protein arrays and highly conductive nanowires. Science 301, 5641 (Sept.), 1882--1884.Google ScholarGoogle Scholar
  66. Zheng, M., Jagota, A., Semke, E. D., Diner, B. A., McLean, R. S., Lustig, S. R., Richardson, R. E., and Tassi, N. G. 2003. DNA-assisted dispersion and separation of carbon nanotubes. Nature Materials 2 (May), 338--342.Google ScholarGoogle Scholar

Index Terms

  1. NANA: A nano-scale active network architecture

            Recommendations

            Comments

            Login options

            Check if you have access through your login credentials or your institution to get full access on this article.

            Sign in

            Full Access

            PDF Format

            View or Download as a PDF file.

            PDF

            eReader

            View online with eReader.

            eReader