Nano-Scale Memory Characteristics of Silicon Nitride Charge Trapping Layer with Silicon Nanocrystals

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Published 28 July 2006 Copyright (c) 2006 The Japan Society of Applied Physics
, , Citation Hyejung Choi et al 2006 Jpn. J. Appl. Phys. 45 L807 DOI 10.1143/JJAP.45.L807

1347-4065/45/8L/L807

Abstract

Silicon nanocrystals (Si-NCs) embedded in a silicon nitride (SiN) layer were fabricated as a charge trapping layer for nonvolatile memory (NVM) device applications. Nano-scale memory characteristics were investigated using conductive atomic force microscopy (C-AFM) and a semiconductor parameter analyzer. Nano-scale memory characteristics of Si-NCs embedded in the SiN layer were obtained from the shift of the current–voltage (IV) curve. Charge trapping/detrapping and multi-level charge storage in Si-NCs embedded in the SiN layer were obtained at a metal–oxide–semiconductor (MOS) structure of about 100 nm2 at room temperature. The flat band voltage (VFB) shift was about 0.37 V, which is agreed well with the calculated VFB shift for one electron per nanocrystal.

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10.1143/JJAP.45.L807