Low jitter scheduling with redundancy control for input-queued switches

Hong Cheng; Yaohui Jin; Yu Gao; YingDi Yu; Wei Guo; Weiqiang Sun; Weisheng Hu

doi:10.1117/12.745287

19 November 2007 Low jitter scheduling with redundancy control for input-queued switches

Hong Cheng, Yaohui Jin, Yu Gao, YingDi Yu, Wei Guo, Weiqiang Sun, Weisheng Hu

Proceedings Volume 6784, Network Architectures, Management, and Applications V; 67842V (2007) https://doi.org/10.1117/12.745287
Event: Asia-Pacific Optical Communications, 2007, Wuhan, China

Abstract

In switch scheduling, jitter becomes an important performance criterion for increasing real-time applications. Low Jitter Decomposition (LJS) was proposed in the frame-based scheduling switches [9]. However, we notice that in LJS, the bandwidth requirement of schedule tables is greater than the actual amount of traffic. The redundant bandwidth requirement not only wastes the resource of switch, but also introduces an extra jitter. In this paper, we propose two algorithms to reduce the extra jitter caused by redundancy: Integer Average Redundancy Control (IARC) and Dichotomy Sequence Redundancy Control (DSRC). We demonstrate that the jitter bound of the two algorithms is lower than that of the scheme without redundancy control. Simulation experiments show that DSRC and IARC can reduce nearly 50% jitter of the scheme without redundancy control at medium switch load. We also show that DSRC has a low complexity (O(1) for each input-output pair) which is important for high-speed switches.

Citation Download Citation

Hong Cheng, Yaohui Jin, Yu Gao, YingDi Yu, Wei Guo, Weiqiang Sun, and Weisheng Hu "Low jitter scheduling with redundancy control for input-queued switches", Proc. SPIE 6784, Network Architectures, Management, and Applications V, 67842V (19 November 2007); https://doi.org/10.1117/12.745287

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KEYWORDS

Switches

Matrices

Computer simulations

Algorithms

Computer programming

Telecommunications

Control systems

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