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A multichannel time-to-digital converter ASIC with better than 3 ps RMS time resolution

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Published 30 January 2014 • © CERN 2014
, , Citation L Perktold and J Christiansen 2014 JINST 9 C01060 DOI 10.1088/1748-0221/9/01/C01060

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1 Graz University of Technology, Rechbauerstr. 12, 8010 Graz, Austria

2 CERN, CH-1211 Geneva 23, Switzerland

Dates

  1. Received 27 November 2013
  2. Accepted 17 December 2013
  3. Published

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1748-0221/9/01/C01060

Abstract

The development of a new multichannel, fine-time resolution time-to-digital converter (TDC) ASIC is currently under development at CERN. A prototype TDC has been designed, fabricated and successfully verified with demonstrated time resolutions of better than 3 ps-rms. Least-significant-bit (LSB) sizes as small as 5 ps with a differential-non-linearity (DNL) of better than ±0.9 LSB and integral-non-linearity (INL) of better than ±1.3 LSB respectively have been achieved. The contribution describes the implemented architecture and presents measurement results of a prototype ASIC implemented in a commercial 130 nm technology.

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10.1088/1748-0221/9/01/C01060