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Monolithic digital galvanic isolation buffer fabricated in silicon on sapphire CMOS

Monolithic digital galvanic isolation buffer fabricated in silicon on sapphire CMOS

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Published

A monolithic four-channel digital galvanic isolation buffer in the 0.5 µm silicon on sapphire (SOS) CMOS technology is reported. Advantage is taken of the insulating properties of the sapphire substrate to integrate on the same die both the isolation structure and the interface electronics. Each isolation channel has been tested to operate at data rates over 100 Mbit/s. The system can tolerate ground bounces of 1 V/µs and is tested for 800 V isolation. The system includes an integrated isolation charge pump to power the input circuit and is hence capable of operating from a single 3.3 V power supply.

Inspec keywords: buffer circuits; CMOS digital integrated circuits; sapphire; monolithic integrated circuits; elemental semiconductors; silicon; isolation technology

Other keywords: data rate; monolithic buffer; 0.5 micron; silicon on sapphire; 3.3 V; insulating properties; isolation channel; ground bounce; four-channel digital galvanic isolation buffer; interface electronics; Si; 800 V; CMOS technology; integrated isolation charge pump

Subjects: Other digital circuits; CMOS integrated circuits

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