Introduction

Semiconductors have been indispensable to solid-state electronic devices since the first solid-state electronic device (i.e., the transistor in 1947) because the channel current of the transistor must be modulated by the carrier (electron and hole) density, which relies on the bandgap of the semiconductors1. With the rapid development of the semiconductor industry, conventional three-dimensional (3D) semiconductors (Si, GaAs, and InP) are encountering challenges in terms of increasing further spatial resolution of the device and temperature-dependent device performances in various environments. The enhanced electric field degrades the carrier mobility in the semiconductor channel. It is because, with the enhanced electric field, the carrier starts to scatter with optical phonon of the semiconductors and lose more of its energy, resulting in the velocity saturation1. Also, the carrier density or device performance depends on the temperature and, as a result, deviates from Moore’s law2,3. To overcome the first challenge, vacuum-channeled devices (vacuum field-effect transistors), which resemble the primitive vacuum tube triode of the early 1900s, have attracted enormous interest because they utilize ballistic transport by tunneling through the vacuum channel4, and recently, they demonstrate the long-term stability processability in 150-mm water scale5. However, industry-applicable current switching was not realized in the tunneling devices, and the source (e.g., silicon) and gate (e.g., indium tin oxide) currents continue to rely on thermally generated carriers, which retain most of the drawbacks associated with conventional semiconductor devices.

As an alternative, two-dimensional (2D) vertical device structures have been proposed6,7,8,9. Despite its unprecedentedly high room temperature mobility10, the graphene FET (GFET) still suffers from insufficient switching (ION/IOFF ~ 10 at room temperature) because of the absence of a bandgap11. Additionally, we know that artificial bandgap opening in graphene inevitably sacrifices the mobility12. In contrast, transition metal dichalcogenide-based FETs have shown ION/IOFF values of up to 108 using their bandgaps, but their carrier mobilities remain at ~20% of that of Si7. These inherent limitations can be resolved by using vertical van der Waals heterostructures and work function modulation of graphene as a switching principle13. This principle was originally demonstrated in graphene barristors (GBs)14 and has been used in various devices containing either organic15,16,17,18 or inorganic19,20,21,22,23,24,25 semiconductor–graphene junctions. In addition, bipolar junction transistor-like devices have been also investigated, where graphene was used as a base material, thus called as graphene-base transistor26,27,28,29,30. The switching in such devices does not rely on the thermally generated charge of semiconductors, but semiconductors are still crucial elements required to achieve efficient switching. Thus these 2D devices have the same limitations as conventional semiconductor devices: scattering-limited carrier mobility and temperature-dependent device performance.

The ideal solution (i.e., the effective switching of ballistic transport without semiconductors) has not yet been realized; indeed, only one-order modulation of ION/IOFF has been reported31. To control ballistic transport adequately, we considered two modes by which current can tunnel through either vacuum or insulator channels: (1) direct tunneling (DT), which most graphene tunneling devices (including ref. 31) use for switching, and (2) field emission (FE), which has been rarely explored. The DT is proportional to the density of states (DOS) of two electrodes, whereas the FE is exponentially influenced by the tunneling barrier height32. When the electric field modulates the charges on graphene, both the work function and DOS at the Fermi level of the graphene are modulated. However, the two tunneling-current modes behave differently under modulation. Although the DT current produces physically limited insufficient switching (e.g., an ION/IOFF of ~50 at room temperature) via the DOS modulation of graphene33, the FE current can be largely modulated by an exponential function of the barrier height.

Here we report a semiconductor-less electronic device based on a van der Waals vertical heterostructure of metal–hexagonal boron nitride (hBN)–graphene–hBN–metal (Fig. 1a–b). We selected the stacked structure as the platform for an FE tunneling current because the graphene–hBN junction is the cleanest 2D semimetal–insulator system34. While a vacuum could be another candidate for the tunneling barrier of semiconductor-less devices without a dielectric breakdown, it would require a higher operating voltage to overcome the vacuum’s barrier height to switch the current. The device mainly switches the FE current by modulating the FE barrier height; therefore, we termed the device a “field-emission barristor” (FEB; Fig. 1c–f). Based on the exponential barrier height dependence of the FE current, we achieved an ION/IOFF of up to 106 without using semiconductors (Fig. 1g). Consequently, the switching performance of our FEB exhibited ignorable degradation at 15 K (Fig. 1h–j), a temperature at which conventional semiconductor devices cannot operate. We calculated the FE barrier height variation by work function modulation in graphene using Fowler–Nordheim (FN) plot. Moreover, the work function modulation in graphene is reliably manipulated by the capacitive coupling among the gate capacitance (CGate), tunneling-channel capacitance (CTC), and quantum capacitance of graphene (CQ) in the FEB. Consequently, the above coupling effect is universal in all 2D vertical device geometries, which implies that the optimization principle can be applied to other vertical devices to improve their performance.

Fig. 1: Fabrication of the FEB and its semiconductor-less device characteristics.
figure 1

a Optical microscopic image of an FEB consisting of stacked metal/hBN/graphene/hBN/metal (scale bar 20 μm). (inset) Scanning electron microscopic image of polymethyl methacrylate (PMMA) bridges, which help thin metal electrodes connect through the thick stack (scale bar: 5 μm) (for more detail, see the “Methods” section). b Schematic diagram of the FEB applying VD and VG. c, d Band diagrams of the FEB (VD > 0) under FE-dominant (c) and DT-dominant conditions (d). The VG modulates the accumulation of electrons on the graphene. e, f Band diagrams of the FEB (VD < 0) under DT-dominant (e) and FE-dominant conditions (f). The VG modulates the accumulation of holes on the graphene. The gate voltage decreases from c to f. g ID switching performance of the semiconductor-less device. ID− and IG− are drain and gate current under VD = −18 V. ID+ and IG+ are drain and gate current under VD = 29 V. For the negative VG, ION/IOFF above 106 has been achieved at 300 K. h Device characteristics of the n-type FEB (VD > 0) at 300 K (left) and 15 K (right). i Device characteristics of the p-type FEB (VD < 0) at 300 K (left) and 15 K (right). For both types, very little temperature degradation of ID was observed. j ID switching under VD = −18 V (red) and 29 V (black) also exhibited little temperature degradation from 400 to 15 K.

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Results

Transport characteristics of semiconductor-less transistor

In Fig. 1g, the FEB with a gate-hBN thickness (tGate) of 62 nm and a tunneling-hBN thickness (tTC) of 64 nm shows an efficient switching (by an ION/IOFF of up to 106) without semiconductors. The channel current (ID) increases exponentially by an increase of the gate bias (VG). As the VG increases, more electrons are accumulated on the graphene, which decreases the work function of graphene by the square root of the electron density and the tunneling barrier height (ΦB) for the “on” state. The FE current ID, which increases exponentially as the ΦB decreases, can be described as follows35:

$$I(V) = \frac{{A_{{\mathrm{eff}}}\;q^3mV^2}}{{8\pi h{\Phi}_{\mathrm{B}}d^2m^\ast }}\exp \left[ {\frac{{ - 8\pi \sqrt {2m^\ast } {\Phi}_{\mathrm{B}}^{\frac{3}{2}}d}}{{3hqV}}} \right],$$
(1)

where Aeff is the effective tunneling area, q is the elementary charge, m is the mass of electron or hole, m* is the tunneling effective mass, V is the applied voltage, h is Plank’s constant, and d is the tunneling distance. While the Schottky current depends on the temperature, the FE current barely depends on the temperature36. The above formula supports the critical device operation, the switching with an ION/IOFF ratio of ~106, presented in Fig. 1g. The performance is unique among graphene-based logic devices without semiconductors. Indeed, former graphene-based tunneling or lateral devices based on DOS-dependent channel current have ION/IOFF ratios of ~10, which is a physical limit imposed by the fact that the charge density modulation is limited to 100 at room temperature37. As VG increases, the tunneling mechanism of the electrons for the gate leakage current is changed from DT to FE at VG = 14 V or a gate field of 0.23 V/nm in a similar manner with ID. The IG remains <0.5% of ID in the VG range. Minimizing the leakage effect on the ID, the gate field was limited to 0.23 V/nm in our study.

A critical issue affecting semiconductor-based devices—i.e., temperature-limited operation—can be resolved by our semiconductor-less ballistic device. Figure 1h–j show the temperature-independent performance of the FEB: the channel current (ID) exhibits little variation at temperatures of 15–400 K under various operating conditions. This independence is attributable to the nature of the FE tunneling. Notably, the current does not degrade even at T = 15 K, at which the charge carriers of most semiconductors would be frozen2. The absence of degradation is a characteristic feature of our semiconductor-less ballistic device.

The channel current in Fig. 1h, i shows two domains that reflect two different tunneling mechanisms (DT and FE) depending on the drain voltage (VD). First, ineffective gating (ION/IOFF ~ 10) appears in the DT regime at low VD, whereas effective gating (ION/IOFF > 104) is activated at high VD. The increase in the drain voltage converts the channel current from DT to FE, allowing the modulation of the FE current shown in Fig. 1j. The transition voltages from DT to FE under positive VD and negative VD decrease from 27 V (VG = −5 V) to 13 V (VG = 10 V) and from −19 V (VG = 5 V) to −8 V (VG = −10 V), respectively; thus a higher VG realizes a lower ΦB.

The FN equation can be formulated as ln(ID/VD2) = α + β/VD, where α and β have relevance to the charge density and tunneling energy barrier, respectively. Thus the linearity between ln(ID/VD2) and 1/VD confirms the FN tunneling38. By assuming that the graphene is a single emitter, α and β were uniquely determined, as follows. The barrier height was obtained from the modified FE equation: \(\ln (I/V^2) = \alpha + \beta /V\), where α and β are \(\ln \frac{{A_{{\mathrm{eff}}}q^3m}}{{8\pi h{\Phi}_{\mathrm{B}}d^2m^ \ast }}\) and \(- \frac{{8\pi \sqrt {2m^ \ast } d}}{{3hq}}{\Phi}_{\mathrm{B}}^{\frac{3}{2}}\), respectively. First, the output characteristic of a FEB was measured for a FEB with a gate dielectric of 21.5 nm and a tunneling channel of 83.8 nm, as shown in Fig. 2a. Then a straight line of which slope is β was obtained by replotting the output characteristic of a FEB according to the modified FE equation. β includes a parameter of the FE barrier height. Therefore, β declined with increasing VG and the FE barrier height decreased from 2.01 eV to 1.84 eV with increasing VG from 2 V to 8 V, as exhibited in Fig. 2b.

Fig. 2: Single-emitter approximation of the FE from graphene.
figure 2

a Output characteristics of FEB were measured by varying VD from 0 to 52 V and VG from 2 to 8 V. As VG increases, turn-on voltage decreases because graphene’s Fermi-level increases (barrier height decreases). b The characteristics were replotted with axes of ln(I/V2) and 1/V. From the linear fitting of the lower part (blue dashed line for VG = 2 V), barrier heights were extracted to 2.01, 1.95, 1.91 and 1.84 eV when VG = 2, 4, 6 and 8 V, respectively (error bars represent standard error). The height decreases by 0.17 eV, as VG increases from 2 to 8 V.

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Optimizing device performances

Device characteristics—work function modulation of graphene, intrinsic gain, ION, delay (τ), cut-off frequency (fT), and power-delay product (PDP)—of the semiconductor-less FEBs were investigated by varying tGate and tTC, where τ is a time delay required to charge gate electrode with ION, fT is a figure of merit of analog transistors in terms of switching speed, and PDP is that of digital ones in terms of required energy for switching12,39,40. The tGate and tTC affect the amplitude of the graphene work function modulation, tunneling-barrier height, and thus device performances. First, the capacitive coupling governs how effectively the VG accumulates charges in the graphene as observed in GFET. The capacitive coupling or quantum capacitance (CQ) of the graphene in the GFET has been determined to reduce the work function modulation because the CQ is serially connected to the gate capacitance CGate (Fig. 3a) and, consequently, consumes a portion of VG. Therefore, the accumulated charge reduces to CQCGate/(CQ + CGate) multiplied by the VG, where the larger the CGate, the higher the effect of CQ, resulting in the smaller accumulated charge on the graphene41,42. However, the FEB involves a more complex network of capacitors because of the additional tunneling-channel capacitor (CTC), as shown in Fig. 3b. As described in the supplementary text, the potential difference of the graphene from the Dirac point (φgr) in the FEB is determined by the following equation (Please see “Capacitive coupling among CTC, CG and CQ” section in the Supplementary Material.):

$$C_{{\mathrm{Gate}}}V_{\mathrm{G}} + C_{{\mathrm{TC}}}V_{\mathrm{D}} = \frac{e}{\pi }\left( {\frac{e}{{\hbar \nu _{\mathrm{F}}}}} \right)^2\varphi _{{\mathrm{gr}}}^2 + (C_{{\mathrm{Gate}}} + C_{{\mathrm{TC}}})\varphi _{{\mathrm{gr}}}.$$
(2)

The left side of the equation is the fictitious charge (Qfic) on graphene accumulated by varying both the operating conditions (VG and VD) and the device structures (CGate and CTC); the right side demonstrates how the Qfic determines φgr with the coupling of CGate and CTC. Both the CTC and CGate govern the work function shift in an identical manner (In conventional transistors, CGate and body capacitance (CBody) also exist in the Si substrate. Their turn-on state was achieved when the minority charge accumulated on the channel, resulting in inversion. In the inversion state, CBody has no role in the capacitive coupling. Therefore, CGate is the most critical capacitance, and we are less concerned about capacitive coupling.). The work function shifts with the accumulated charge and can be obtained for the GFET and FEB by varying the Ctotal = CTC + CGate, as shown in Fig. 3c. A smaller Ctotal produces a larger work function modulations of graphene by the same amount of charges (x-axis). Therefore, the minimum value of the Ctotal should be targeted to improve the ION/IOFF, and the upper limit of the shift with a fixed CGate can be determined when the CTC becomes 0 (i.e., the case of the GFET). The above coupling analysis is generally applicable to other vertical devices, including field-effect tunneling transistors, vertical field-effect transistors (vFETs), thin-film barristors, and GBs, that rely on the work function modulation of graphene, as shown in Supplementary Fig. 1. Furthermore, the modulation can be improved by engineering the capacitance—the dielectric constant and the thickness, as described in Supplementary Note 3.

Fig. 3: Capacitive coupling, intrinsic gain, and device performances.
figure 3

Capacitive coupling of a GFET and b FEB. c Work function shift by varying the Ctotal = CTC + CGate. Ctotal = 6.9 μF/cm2 when tGate = 1 nm and tTC = 1 nm; Ctotal = 0.69 μF/cm2 when tGate = 10 nm and tTC = 10 nm; and Ctotal = 0.069 μF/cm2 when tGate = 100 nm and tTC = 100 nm. The work function modulation of GFET is the upper limit of that of the FEB. d Intrinsic gain (gm/gds) by varying the tTC/tGate. The intrinsic gain is proportional to the tTC/tGate (the red dotted line is for guidance). e Device performances when tTC is 19.5, 30.7, 32, 49, 50, and 54.8 nm, and tGate is 27.8, 42.8, 33, 36, 52, and 54.4 nm, respectively. ION, 1/τ, fT, and PDP increase with tTC. They increase to ~1000 times as tTC increases by ~35 nm, except for PDP. f Field-emission barrier height by varying tTC, extracted by single-emitter approximation. The barrier height between graphene’s Dirac point and the conduction band decreases as tTC increases. It decreases by 1.2 eV, as tTC increases from 19.5 to 301 nm. g Temperature-dependent performances of FEB. ION of the most FEBs (e.g., device 1, black shapes) varies only 11.5% as temperature increases from 1.78 to 300 K; τ does <2.1%; fT does 10.6%; PDP does 1.5%. In contrast, some devices such as 2 (red shapes) exhibited temperature-dependent performances: ION varies 314%; τ does 17.9%; fT does 177%; PDP does 17.9%.

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Second, the intrinsic gain of FEB, obtained by the ratio of transconductance (gm) to drain conductance (gds)12, is proportional to the CGate–CTC ratio (tTC–tGate ratio), as shown in Fig. 3d. Since they have not reported the gain of vertically stacked devices13, there is some doubt that the devices could not amplify (intrinsic gain <1). However, we obtained the gains of 2.5 and 3.6 using FEBs with the CGate–CTC ratios of 2.0 and 3.9, respectively. Along with the other 4 FEBs, we clarified that the intrinsic gain is proportional to the CGate–CTC ratio, as exhibited in Fig. 3d. It is because the fictitious charge, which determines the work function of the graphene, is linearly related to both VG and VD by a coupling between the CGate and CTC, described in the above equations.

Lastly, the other performances such as ION, τ, fT, and PDP, were governed by tTC, as exhibited in Fig. 3e. As tTC increases from 19.5 to 54.8 nm, ION, τ, and fT are dramatically improved (~1000 times): ION increases from 0.87 mA/cm2 to 1.59 A/cm2; the τ decreases from 0.7 ms to 0.52 μs; fT increases from 0.21 kHz to 0.59 MHz. It is because the ION exponentially depends on the barrier height at the graphene–hBN junction, which decreases with tTC, as shown in Fig. 3f. The energy difference between the graphene’s Dirac point and the conduction band of 19.5-nm thick hBN is obtained as 3.2 eV using single-emitter approximation; that of 301-nm thick one decreased to 2.1 eV. It is common for electron affinity of 2D materials to decrease with their thickness9,43. Therefore, they can improve the device performances by increasing the tTC. However, the thicker the tTC, the greater is the VD required for field emission from the graphene to the drain electrodes. It is why the PDP increases(or worsens) as the tTC increases: as the tTC increases from 19.5 to 54.8 nm, the PDP increases from 4.3 to 10.4 μJ/cm2. Moreover, the lower the barrier height, the more dominant the temperature-dependent current. For example, vFETs with graphene–WS2 heterostructure exhibited temperature-dependent performances: the ION increased by around 1 order, and the ION/IOFF decreased by approximately 2 orders19. The dependence originates from the transport mechanism of the vFET: the thermionic emission. Therefore, when optimizing the barrier height of the semiconductor-less transistor, the upper limit is determined by the device performances—ION, τ, and fT—and the lower limit is by PDP and the thermionic emission current.

Notably, temperature independence of the performances is the unique property of the semiconductor-less vertical transistor with field-emission current, as shown in Figs. 1j and 3g. Most FEBs exhibited temperature-independent performances. A representative device’s performances are shown in Fig. 3g (black shapes), where device parameters varied by only 1.5% or up to 11.5%. However, some devices such as device 2 (red shapes) exhibited a little more dependence on temperature (from 17.9 to 314%). We understand that the temperature-dependent characteristics of the semiconductor-less devices originate from Poole–Frenkel transport mediated by intrinsic defects of hBN aggregated in its defect-rich domain44. The analysis is described in Supplementary Note 4.

Consequently, the result indicates that the device performances of FEB can be engineered in different ways as follows: (1) the switching of FEB is governed by the capacitive coupling. (2) The intrinsic gain is proportional to the CGate–CTC ratio. (3) The barrier height of graphene–hBN junction decreases with the tTC. (4) The thicker the tTC, the better is the performance of ION, τ, and fT. At the same time, PDP is degraded and temperature-dependent portion of the current increases to induce the temperature dependence of the FEB. Notably, all the characteristics of the semiconductor-less devices with optimized barrier height are temperature independent, unless the defect-rich domain of hBN was used44. Therefore, an optimized device geometry (e.g., tTC) is indeed a key to realize the temperature-independent transistors with industry-applicable performances.

Discussion

We report the semiconductor-less solid-state switching device with an ION/IOFF of 106 in which a ballistic current can be effectively modulated by electric gating; thus the device exhibits not only adjustable gain but also unprecedented temperature-independent performances, such as ION, τ, fT, and PDP. Moreover, we clarified the role of capacitive coupling among the CGate, CTC, and CQ for the modulation of the graphene work function in the vertical device geometry. In our modeling, the CTC is as essential as the CGate. The capacitive coupling is universal for all vertically stacked devices based on van der Waals heterostructures, which exploit the work function modulation of the graphene as their main switching mechanisms. Our FEB achieves industry-applicable device operations with current stability over a wide range of the temperature, which resolves the long-standing issue in conventional semiconductor-based transistors and extends the potential of 2D van der Waals devices to applications in extreme environments.

Methods

Device fabrication

Monolayer graphene and two samples of hBN were prepared by mechanical exfoliation method. It was verified that the graphene is monolayer by using Raman spectroscopy, and the thickness of the hBN was measured by atomic force microscope. To make metal/hBN/graphene/hBN/metal vertical structure, the conventional wet transfer method and dry transfer method, which is called polydimethylsiloxane (PDMS) stamping, were conducted45,46. First, the hBN flakes were exfoliated onto PDMS surface to find several samples of few layer hBN. After finding two samples of few layer hBN on each PDMS surface using optical microscope, one was transferred onto exfoliated monolayer graphene on SiO2 substrate by using the PDMS stamping method, and the other one was transferred onto Au/Cr gate electrode, which was deposited on 300 nm SiO2 substrate. Second, the sample of hBN/graphene was coated with 950 K PMMA C4 at 4500 rpm by using spin coater. After that, the PMMA-coated hBN/graphene was transferred onto the hBN/metal structure by using the conventional wet transfer method. Third, in case that total thickness of the heterostructure was thicker than 80 nm, the metal/hBN/graphene/hBN junction was coated with the PMMA to make a PMMA bridge. The PMMA was cross-linked by exposure to an electron beam with a very high dose (15,000 μC/cm2), and the top electrodes were deposited along the cross-linked PMMA by using electron beam lithography and electron beam evaporator.

I–V measurement

Field-emission current of the device was measured in vacuum probe station and physical property measurement system at various temperatures with Keithley 4200.