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A Parallel VLSI Video/Communication Controller

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Abstract

This paper presents a VLSI architecture specifically designed as a video/communication controller to support emerging applications in the area of video/data communications. The controller is a parallel architecture consisting of three (3) processing modules, a shared memory with four (4) banks and two (2) input/output modules and operating at the transfer speed of 622 Mbits/sec. The processing modules and memory banks communicate through a low cost interconnection scheme able though to perform at system's required data transfer rate. The entire system constitutes a component which can accommodate a switching system as an intelligent buffer with real time processing and multiplexing capabilities. The component performs operations on fixed and/or variable length packets of data on a stream basis. The architecture embeds both the processing and the memory modules, thus producing a “system on a chip” solution.

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References

  1. L. Chiariglione, "MPEG and Multimedia Communications," IEEE Transactions on Circuits and Systems for Video Technologies, vol. 7, 1997, pp. 5–18.

    Article  Google Scholar 

  2. ISO/CD 11172–2, Coding of Moving Pictures and Associates Audio for Digital Storage Media at up to about 1.5 Mbps, March 1991.

  3. K. Hwang and F. Briggs, Computer Architecture and Parallel Processing, New York: McGraw-Hill, 1984.

    MATH  Google Scholar 

  4. F.T. Leighton, Introduction to Parallel Algorithms and Architec-tures, San Mateo, California: Morgan Kaufmann, 1992.

    Google Scholar 

  5. G. Doumenis, G. Konstantoulakis, G. Korinthios, G. Lykakis, D. Reisis, and G. Synnefakis, "An Efficient Component (IN-RAM) for Buffer Management and Multi-protocol Implementa-tion in ATM Systems," in Proceedings of the IEEE ICECS'99, 1999, vol. 1, pp. 93–96.

    Google Scholar 

  6. IN-RAM Consortium, "Device Specification Report," Deliver-able D.2.2.1, ESPRIT project "IN-RAM" (EP26320), May1998.

  7. IN-RAM Consortium, "Interfaces and Memory Manager Detailed Description," Deliverable D.3.1.1, ESPRIT project "IN-RAM" (EP26320), September 1998.

  8. M.R. Frater, J.F. Arnold, and P. Tan, "ANewStatistical Model for Traffic Generated by VBR Coders for Television on the Broad-band ISDN," IEEE Transactions on Circuits and Systems for Video Technologies, vol. 4, 1994, pp. 521–526.

    Article  Google Scholar 

  9. D. Heyman, A. Tabatabai, and T.V. Lakshman, "Statistical Anal-ysis and Simulation Study of Video Teleconference Traffic in ATM Networks," IEEE Transactions on Circuits and Systems for Video Technologies, vol. 2, 1992, pp. 49–59.

    Article  Google Scholar 

  10. T.V. Laskhman, A. Ortega, and A. Reibman, "VBRvideo: Trade-offs and Potentials," Proceedings of IEEE, vol. 86, no. 5, 1998, pp. 952–973.

    Article  Google Scholar 

  11. B. Maglaris, D. Anastassiou, P. Sen, G. Karlsson, and J.D. Robbins, "Performance Models of Statistical Multiplexing in Packet Video Communication," IEEE Transactions on Communications, vol. 36, 1988, pp. 834–843.

    Article  Google Scholar 

  12. N.M. Marafih, Ya-Qin Zhang, and R.L. Pickholtz, "Model-ing and Queueing Analysis of Variable-Bit-Rate Coded Video Sources in ATMNetworks," IEEE Transactions on Circuits and Systems for Video Technologies, vol. 4, 1994, pp. 121–128.

    Article  Google Scholar 

  13. P. Pancha and M. El Zarki, "Bandwidth Allocation Schemes for Variable-Bit-Rate MPEG Sources in ATMNetworks," IEEE Transactions on Circuits and Systems for Video Technologies, vol. 3, 1993, pp. 190–198.

    Article  Google Scholar 

  14. N. Doulamis, A. Doulamis, G. Konstantoulakis, and G. Stassinopoulos, "Performance Models of VBR MPEG Coded Video Sources," in Proceedings of the IEEE International Conference on Communications, Montreal, Canada, June 1997.

  15. D.P. Heyman, A. Tabatabai, and T.V. Laskman, "Statistical Anal-ysis of MPEG-2 Coded VBR Video Traffic, " in Proceedings of PacketVideo'94, B2.1.

  16. J. Mata, C. Pagan, and S. Sallent, "Multiplexing and Resource Allocation of VBR MPEG Video Traffic on ATM Networks," in Proceedings of the IEEE International Conference on Communications, Dallas, June 1996.

  17. C. Ohta, K. Shinagawa, and Y. Onozato, "Cell Loss Properties for Multiplexing of MPEG Video Sources Considering Picture Types in ATM Networks," in Proceedings of the IEEE International Conference on Communications, Dallas, June 1996.

  18. O. Rose, "Statistical Properties of MPEG Video Traffic and their Impact on Traffic Modeling in ATMSystems," in Proceedings of the 20th Conference on Local Computer Networks, Minneapolis October 16–19, 1995.

  19. M.G. Hluchyi and M.J. Karol, "Queuing in High Performance Packet Switching," IEEE Journal on Selected Areas in Commu-nications, vol. 6, no. 9, 1988, pp. 1578–1597.

    Google Scholar 

  20. L. Kleinrock, Queuing Systems, New York: Wiley, 1975, vol. 1.

    Google Scholar 

  21. G. Kornaros, C. Kozyrakis, P. Vatsolaki, and M. Katevenis, "Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow Control," in Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI'97), Univ. of Michigan, Ann Arbor, USA, September 1997, pp. 127–144.

  22. J.S Tyrner, "Queuing Analysis of Buffered Switching Net-works," IEEE Transactions on Communications, vol. 36, no. 6, 1988, pp. 734–743.

    Article  Google Scholar 

  23. S. Gopalakrishnan, D. Reininger, M. Ott, "Realtime MPEG Sys-tem Stream Transcoder for Heterogeneous Networks," submitted to PacketVideo' 99.

  24. M. Hirano and N. Watanable, "Characteristics of a Cell Mul-tiplexer for Bursty ATM Traffic," in Proceedings of the IEEE International Conference on Communications '89, Boston, MA, 1989.

  25. G. Doumenis, V. Kaloudis, and P. Karmazin, "Next Generation Telecommunication Processors for ISDN/LANApplications," in Proceedings of the EMMSEC '98–8th Annual Conference on European Multimedia Microprocessor Systems and Electronic Commerce, Bordeaux, France, September 1998.

  26. G. Doumenis, D. Reisis, "Common Hardware Structure for the Segmentation and Reassembly Sublayer of the ATM based Broadband ISDN," in Proceedings of the IEEE COMCON IV, Rhodes, Greece, 1993.

  27. ATM Forum, Traffic Management Specification, Version 4.1, March 1999.

  28. M. Krunz, R. Sass, and H. Hughes, "Statistical Characteristics and Multiplexing of MPEG Streams," in Proceedings of the IEEE International Conference on Communications, June 1995.

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Authors and Affiliations

  1. Telecommunications Lab., Computer Science Division, National Technical University of Athens (NTUA), Zographou, GR-157 73, Athens, Greece

    Gr. Doumenis, G. Konstantoulakis, G. Lykakis & G. Synnefakis

  2. Electronics Lab., Applied Physics Division, University of Athens (UoA), Greece

    G. Korinthios & D. Reisis

Authors
  1. Gr. Doumenis
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  2. G. Konstantoulakis
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  3. G. Korinthios
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  4. G. Lykakis
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  5. D. Reisis
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  6. G. Synnefakis
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Doumenis, G., Konstantoulakis, G., Korinthios, G. et al. A Parallel VLSI Video/Communication Controller. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 28, 245–257 (2001). https://doi.org/10.1023/A:1011121709723

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  • DOI: https://doi.org/10.1023/A:1011121709723

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