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A Functional Decomposition Method for Redundancy Identification and Test Generation

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Abstract

We present a new combinational circuit automatic test-pattern generation (ATPG)acceleration method called EST that detects equivalent search states, which are saved for later use. The search space is learned and characterized using E-frontiers, which are circuit cut-sets induced by theimplication stack contents. The search space is reduced by matchingthe current search state against previously-encountered search states(possibly from prior faults), and this reduces the length of thesearch. A second contribution is a calculus of redundant faults, which enables EST to make many more mandatoryassignments before search than is possible by prior algorithms, byeffectively using its knowledge of prior faults proven to beredundant. This accelerates ATPG for subsequent faults. Thesemethods accelerate the TOPS algorithm 33.3 times for thehard-to-test faults in the ISCAS ‘85 benchmarks, and the SOCRATES algorithm 5.6 times for the same hard-to-test faults, with little memory overhead.

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Authors and Affiliations

  1. Electrical and Computer Eng. Dept., Rutgers University, P.O. Box 909, Piscataway, N.J, 08855-0909

    Michael L. Bushnell

  2. JXG Consulting, 25 Bedell Rd., Poughkeepsie, NY, 12603

    John Giraldi

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  1. Michael L. Bushnell
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Bushnell, M.L., Giraldi, J. A Functional Decomposition Method for Redundancy Identification and Test Generation. Journal of Electronic Testing 10, 175–195 (1997). https://doi.org/10.1023/A:1008207423859

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