Solder joints layout design and reliability enhancements of wafer level packaging using response surface methodology
Introduction
The WLCSP technologies currently in use are attractive to the electronic packaging industry because of their excellent thermal performance, smaller size, lighter weight, etc. Similar to other electronic packages such as the flip chip package, and the ball grid array package; the reliability of the solder joints of the WLCSP without underfill remains a critical issue that needs to be resolved. A major failure mode for these above-mentioned packages is thermo-mechanical fatigue of the solder joints due to the thermal stress induced by the CTE mismatch between the silicon die and the substrate.
The solder joints reliability of the WLCSP has been a long-standing issue of interest to researchers in the advanced packaging field [1], [2], [3], [4], [5], [6]. For example, Lau and Lee [2] explored the effects of the thickness of a built-up printed circuit board (PCB) on the solder joint reliability of a WLCSP. In addition, the effects of design parameters such as die thickness and the kinds of solder material, have been extensively reported in the literature [2], [3]. However, the traditional WLCSP shows poor solder joint reliability during accelerated thermal cycling (ATC) tests. Therefore, proper structural designs of several different WLCSPs have been proposed in order to solve the reliability issue. Gonzalez et al. [4] introduced the concept of silicone under the bump (SUB) thereby creating the mechanical property of low module within the WLCSP so as to release the thermal stresses. Chang and Chiang [5] formed the Cu studs on the solder pads prior to the solder reflow process in order to substantially increase the strength of the solder joint itself. On the other hand, Chiang et al. [6] and Mercador et al. [7] found that solder joint reliability is highly dependent upon the geometry of the solder joint, such as the standoff height, lower/upper contact angles, solder volume, and solder joint profile. In order to obtain a better overall understanding of both the significance and the interaction effect of each factor as mentioned above, many systematic statistical approaches have been adopted to explore the relationship between design variables and the response. Vandevelde et al. [8] estimated the solder joint reliability of chip scale packaging by associating the FEA with DOE in order to obtain the parameter sensitivity. van Driel et al. [9] applied response surface models (RSMs) to determine the optimal settings of the product/process designs versus the possible failure mode of a vertical die crack within the typical die-attach packaging structure. However, none of these forgoing works gave any consideration to the WLCSP with stress compliant layer. And especially, none discussed the impacts and interactions of the upper/lower solder pad arrangements that have an influence on the fatigue life of the solder joint within the novel WLCSP, referred to as DL-WLCSP, and which is proposed in this present research.
The cross-sectional view of a DL-WLCSP is shown in Fig. 1. Two stress compliant layers are interposed between the silicon die and the solder joint array, to reduce the thermal deformation that resulted from a larger CTE mismatch of materials during temperature thermal loadings. The Rambus DRAM with 62 I/Os in area-arrayed format is taken as the test vehicle of DL-WLCSP (Fig. 2). With the purpose of protecting the internal solder joints, the total numbers of eight dummy solder joints, which are designed to be arranged in the corner areas of the packaging layout, can be considered as structural dummy supports with no electrical signals passing through them. The objectives of the present study include: (1) to predict the solder joint reliability by using a non-linear finite element analysis, including a 3D WLCSP model. In addition, validate the results of the experimental test by comparing them with the procedures of the FEA; and (2) to systematically present an effective design procedure for the prediction of solder joint reliability based on the application of the Central Composite Design, and followed by the analysis of the response sensitivity of the die-side and substrate-side pad diameters.
Section snippets
The central composite design based response surface methodology
As we know, the RSM is an effective tool for establishing the explicit relationship of an un-known system. In RSM, the CCD is a popular used method, and is applied in the construction of the second-order model in this research for better efficiency. With this method, a set of design variables is chosen and analyzed for curvature and importance in the design space. As shown in Fig. 3, a two-variable CCD is composed of a 2k factorial or 2k–p fractional factorial design, extended by additional
The CCD scheme with finite element analysis
In order to predict more accurately the response of the thermal fatigue cycles caused by the interaction of the die-side and substrate-side pad sizes, the practical three levels for each design variable for DL-WLCSP in the CCD are listed in Table 1. There are nine runs of screening the DOE required to be included in the RSM model. Moreover, the ANOVA F-test is also applied to find the significant model terms. For the analytic case in this study, the quadratic model equation mentioned in Eq. (2)
The validation of the reflowed solder joint profile
The surface Evolver software, based on the energy method, is introduced to simulate the solder joint profile after the die has been assembled to the substrate. It should be noted that both the standoff height of the solder joints and their contact angle play a very important role in the solder joint fatigue life. Generally speaking, the higher the standoff height and the blunter the contact angle the better the solder joint reliability (see Fig. 4). In many cases the contact angle is the major
Parametric analysis
Due to the fact that the two dummy solder joints arranged on the outer side of the die are used as a structural support to protect the inner solder joints, it is of no value to explore their solder joint reliability. Thus, we only concern our self in this work with the fatigue life cycle of the critical solder joints that have electronic signals passing through them.
Before discussing the effect of solder pad openings on solder joint reliability with the CCD method, two other important factors
Conclusions
In this present study, a novel WLCSP structure with stress compliant layer and dummy solder joints, named DL-WLCSP, was proposed to enhance the solder joint reliability. Moreover, a hybrid method is employed to predict the profile of solder joint after reflow process. Through three-dimensional (3D) non-linear FEA and experimental validation under the same condition of ATC testing, both methods indicated that the fatigue crack on the solder joint would occur on the substrate-side close to the
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