Upper bounds for reversible circuits based on Young subgroups

doi:10.1016/j.ipl.2014.01.003

Information Processing Letters

Volume 114, Issue 6, June 2014, Pages 282-286

https://doi.org/10.1016/j.ipl.2014.01.003 Get rights and content

Highlights

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We present new upper bounds on the number of Toffoli gates in reversible circuits.
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The idea is to use a synthesis method based on Young subgroups as starting point.
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One technique derives the bounds based on function decomposition.
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Another technique is based on existing ESOP upper bounds.
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The best new upper bound improves the existing one by around 77%.

Abstract

We present tighter upper bounds on the number of Toffoli gates needed in reversible circuits. Both multiple controlled Toffoli gates and mixed polarity Toffoli gates have been considered for this purpose. The calculation of the bounds is based on a synthesis approach based on Young subgroups that results in circuits using a more generalized gate library. Starting from an upper bound for this library we derive new bounds which improve the existing bound by around 77%.

Introduction

Reversible computation [1] has proven itself as a very promising research area, especially for applications to emerging technologies. This can be seen by its results in emerging applications such as quantum computation [2], superconducting quantum interference devices (SQUID) [3], and nanoelectromechanical systems (NEMS) [4], but also in low power electronics [1], [5].

The branch of reversible computations that is most applicable to these areas is the reversible logic models. Here, especially synthesis of reversible logic has become an intensively studied topic and several approaches have been proposed [6], [7], [8].

To compare the efficiency of different synthesis approaches it is important to evaluate the resulting circuits. Depending on the target application, different metrics are applied to measure the complexity of a given circuit. Among these metrics we find the number of gates and the gate delay (depth). But also important is the number of elementary quantum gates and the number of lines (width) that describes the number of lines used for temporary computations (called ancilla lines). For more details the reader is referred to [9].

In this paper we investigate upper bounds to the number of gates that in general are needed to implement reversible circuits. This is important as a first-approach to understand the complexity of reversible circuits, but, as mentioned, also to give an overall quality-measure of the different reversible synthesis methods. Previous research has investigated this topic based on specific synthesis algorithms and using a restricted gate library [10], [11].

Our work is both an improvement over previous reported upper bounds and an extension of the upper bound to a more general gate library. The improvement shows by combining a synthesis method based on Young subgroups [7] with decomposition of exclusive sum-of-products (ESOP) expressions into the different gate libraries [12], [13].

Section snippets

Exclusive sum-of-products

Exclusive sum-of-products (ESOPs, [14]) $f = ⨁_{i = 1}^{k} x_{i_{1}}^{p_{i_{1}}} \land \dots \land x_{i_{l_{i}}}^{p_{i_{l_{i}}}}$ are two-level descriptions for Boolean functions in which a function is composed of k product terms that are combined using the exclusive-OR (EXOR, ⊕) operation. A product term is the conjunction of $l_{i}$ literals where a literal is either a propositional variable $x^{1} = x$ or its negation $x^{0} = \bar{x}$ . ESOPs are the most general form of two-level AND-EXOR expressions.

Each n-variable function has an infinite number of ESOP representations [14].

Existing upper bounds for reversible circuits

Motivated by the fact that upper bounds play a significant role in evaluating the complexity of synthesized reversible circuits, many methods for obtaining the upper bounds for given functions have already been studied. In [10], it has been proven that every reversible function over n variables can be realized with no more than $n \cdot 2^{n}$ MCT gates. This upper bound was obtained from transformation-based synthesis approaches as initially presented in [19]. The algorithm traverses each of the $2^{n}$ rows

Upper bound based on function decomposition

First, we present a method to obtain upper bounds based on exact synthesis techniques [12], [13] which guarantee a minimal circuit representation combined with function decomposition.

Theorem 1

An n-bit single-target gate can be realized with at most $u (n) = 3 \cdot 2^{n - 3} - 2$ MCT gates, if $n ⩾ 5$ .

Proof

The proof is obtained by induction on n. For the base case let $n = 5$ . Using exhaustive search we enumerated all 65 536 Boolean functions that can be represented by a 5-bit single-target gate and for each one we obtain the minimal

Upper bound based on ESOP expressions

Tighter upper bounds for reversible circuits can also be obtained by combining the synthesis approach outlined in Section 3.2 using upper bounds for the size of ESOP expressions.

Theorem 3

An n-bit single-target gate can be realized with at most $u (n) = 2^{n - 1}$ MCT gates.

Proof

This follows from the PPRM representation, which is canonical for a given function when disregarding the order of product terms. Hence, there exists a control function $g : B^{n - 1} \to B$ which PPRM expression consists of all $2^{n - 1}$ product terms. □

Theorem 4

Summary and conclusions

Table 1 summarizes the shown tighter upper bounds to represent a single-target gate using Toffoli gates in the MCT and MPMCT gate libraries in the second and third column. One obtains the upper bound for the number of gates in a reversible circuit by multiplying each number by $(2 n - 1)$ . The resulting values are shown in the fourth and fifth column.

To get a better intuition how the new bounds compare to the existing one, we listed their absolute values for up to 10 variables in Table 2. The first

Acknowledgement

This work was partly funded by the European Commission under the 7th Framework Programme and by the Danish Council for Strategic Research in the framework of the MicroPower research project.

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Upper bounds for reversible circuits based on Young subgroups

Highlights

Abstract

Introduction

Section snippets

Exclusive sum-of-products

Existing upper bounds for reversible circuits

Upper bound based on function decomposition

Upper bound based on ESOP expressions

Summary and conclusions

Acknowledgement

Reversible Computing: Fundamentals, Quantum Computing and Applications

A scheme for efficient quantum computation with linear optics

Nature

Progress towards reversible computing with nSQUID arrays

IEEE Trans. Appl. Supercond.

Comparing CMOS-based and NEMS-based adiabatic logic circuits

Reversible logic issues in adiabatic CMOS

An algorithm for synthesis of reversible logic circuits

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Young subgroups for reversible computers

Adv. Math. Commun.

Synthesis of reversible circuits with minimal lines for large functions

On figures of merit in reversible and quantum logic designs

Quantum Inf. Process.

Reversible cascades with minimal garbage

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.