Self-organization and ordering in nanocrystalline Si/SiO2 superlattices

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Abstract

The solid phase crystallization of nanometer-thick layers of disordered Si confined between layers of amorphous SiO2 has been achieved using high temperature annealing. For ultrathin Si layers (∼1–3nm thick) crystallization was not possible even after extensive annealing at temperatures up to 1100°C, because of the high strain fields introduced by the SiO2 layers. However, for thicker layers (∼4–20nm thick) a variety of Si nanocrystals ranging in shape from spheres to bricks could be spontaneously formed and, in suitable cases, oriented along the 〈111〉 crystallographic direction. This formation of organized nanocrystals is an important step towards the construction of Si/SiO2 quantum devices.

Introduction

The spontaneous formation of organized nanocrystals has been discovered in the heteroepitaxial growth and chemical synthesis of III–V and II–VI semiconductors [1], [2], [3], [4], [5]. A reproducible fabrication of size-controlled Si nanocrystals encapsulated by SiO2 is complicated by the amorphous nature of SiO2 and the mismatch in their lattice constants and thermal expansion coefficients. In previously reported Si nanocrystal fabrication [6], [7], [8], [9], [10], precise control over the nanocrystal shape and crystallographic orientation has never been attained. A preferred crystallographic orientation, which can be introduced by self-organization, is especially important for Si quantum dots because of the Si indirect-gap band structure and a strong anisotropy in the energy-momentum dispersion along different directions within the Brillouin zone [11]. An important step forward in the size control of Si nanocrystals was the introduction of precise growth techniques to produce ultrathin layers of disordered Si (d-Si) separated by amorphous SiO2 (a-SiO2) layers [12], [13]. Crystallization of these thin layers (∼1–3nm thick) proved to be very difficult, and actually impossible for the thinnest layers, even after extended annealing at temperatures up to 1100°C [14]. This is because of the high strain fields introduced by the large lattice mismatch of Si and SiO2 [14]. Only for larger layer thicknesses can crystallization be achieved [15], [16]. Here we report on self-organization and ordering in Si nanocrystals fabricated by the solid phase crystallization (SPC) of 4–20nm thick Si layers confined between amorphous SiO2 layers. Depending on the layer thickness and thermal processing, Si nanoparticles form in various shapes and in a preferred orientation.

Section snippets

Experiment

The d-Si/a-SiO2 superlattices (SLs) were grown on Si wafers by radio frequency magnetron sputtering and plasma oxidation in a Perkin–Elmer 2400 sputtering system. The layer thickness for both d-Si and a-SiO2 was kept constant throughout the SL. The d-Si layers were crystallized by rapid thermal annealing (RTA) at 900°C for 60s followed by quasi-equilibrium furnace annealing starting from 750°C with a 10°C/min temperature increase up to 1100°C. Rapid thermal and furnace annealing were performed

Results and discussion

Fig. 1 compares transmission electron microscope (TEM) micrographs of SLs with 4.2nm [Fig. 1(a)], 8.5nm [Fig. 1(b)] and 20nm [Fig. 1(c)] thick nanocrystalline Si (nc-Si) layers crystallized under identical conditions. The 4.2nm thick nc-Si layer consists mostly of spherical and elliptical nanocrystals with significant variations in their shape [Fig. 1(a)]. The 8.5nm thick nc-Si layer consists mainly of square-shaped Si nanocrystals. For both samples the SiO2 separating layers appear almost

Conclusions

In conclusion, we note that Si based microfabrication has been utilizing the unique properties of the Si/SiO2 interface since the beginning of CMOS technology. By extension of this work, the key issue for the development of reliable nanoscale Si structures and devices is the quality of the interface between a Si nanocrystal and the SiO2 insulating layer. For many applications, including Si/SiO2 tunnel devices, a defect-free, atomically flat and compositionally abrupt Si/SiO2 interface is

Acknowledgements

We thank G.I. Sproule, J.-M. Baribeau, J. Diener, D. Kovalev, and F. Koch for their contributions to different aspects of this work, which was supported by the US Army Research Office, the National Science Foundation, and Motorola.

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