Elsevier

Integration

Volume 6, Issue 2, July 1988, Pages 127-146
Integration

ALSO: A system for chip floorplan design

https://doi.org/10.1016/0167-9260(88)90036-3Get rights and content

Abstract

This paper presents a system to generating non-slicing structure floorplan. The system is divided into initial placement, initial floorplan construction and floorplan packing. In the initial placement algorithm, the area of each module as well as its interconnections are considered and modeled as an unconstrained optimization problem. A penalty is introduced if two modules overlap; the greater is overlap is, the larger the penalty will be. A block packing algorithm is introduced which iteratively compacts the bounding rectangle by changing the shapes of modules according to their shape constraints. A novel feature of the packing algorithm is that modules are “shifted back” to obtain the maximal slack region for modules (a slack region is the dead space mismatches between modules). Experimental results show that this method achieves better area utilization than slicing structure floorplanning approaches, especially when the number of fixed-shaped modules is large.

References (21)

  • L. Stockmeyer

    Optimal orientations of cells on slicing floorplan design

    Inform. and Control

    (1983)
  • B.T. Preas et al.

    Placement algorithms for arbitrary shaped blocks

  • U. Lauther

    A min-cut placement algorithm for general cell assemblies based on a graph representation

  • R.H.J.M. Otten

    Automatic floorplan design

  • R.H.J.M. Otten

    Efficient floorplan optimitation

  • D.P. LaPotin et al.

    Mason: A global floor-planning tool

  • D.F. Wong et al.

    A New Algorithm for Floor Plan Design

  • L.S. Woo et al.

    Pioneer: A macro-based floor-planning design system

    VLSI Systems Design

    (August, 1986)
  • W.R. Heller et al.

    The planar package planner for system designers

  • K. Maling et al.

    On finding most optimal rectangular package plans

    Proc. 19th Design Automation Conf.

    (1982)
There are more references available in the full text version of this article.

Cited by (0)

a

Y.C. Hsu was born in Taitung, Taiwan, Republic of China, on April 5, 1958. He received the B.S. degree in computer science and information engineering fro National Taiwan University, Taiwan, Republic of China, in 1981, and M.S. and Ph.D. degrees in computer science from University of Illinois at Urbana-Champaign in 1986 and 1987, respectively. His current research interests are in CMOS circuit design and computer-aided design.

b

William d. Kubitz is a professor and associate head of computer science at the University of Illinois, where he has been a member of the faculty since 1970. He received a B.S. in engineering physics, an M.S. in physics, and a Ph.D. in electrical engineering from the same institution. From 1962 to 1964, he was a development engineer with General Electric Company. His research interests include design automation for VLSI using an automatic synthesis approach and generalized graphics for a networked engineering workstation environment. He belongs to AAAS, ACM, SID, and Sigma Xi, and is a senior member of the IEEE.

View full text