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A linked list run-length-based single-pass connected component analysis for real-time embedded hardware

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Abstract

Conventional connected component analysis (CCA) algorithms render a slow performance in real-time embedded applications due to multiple passes to resolve label equivalences. As this fundamental task becomes crucial for stream processing, single-pass algorithms were introduced to enable a stream-oriented hardware design. However, most single-pass CCA algorithms in the literature inhibit maximum streaming throughput as additional time such as horizontal blanking period is required to resolve label equivalence. This paper proposes a novel single-pass CCA algorithm, using a combination of linked list and run-length-based techniques to label and resolve equivalences as well as extracting the object features in a single raster scan. The proposed algorithm involves a label recycling scheme which attains low memory requirement design. Experimental results show the implementation of the proposed CCA achieves one cycle per pixel throughput and surpasses the most memory-efficient state-of-the-art work up to 25 % reduction in memory usage for \(7680\times 4320\) pixels image.

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Acknowledgments

The authors would like to thank Universiti Teknologi Malaysia (UTM) for support in the research and development of this work. This work is supported by the Ministry of Science, Technology and Innovation, Malaysia (MOSTI), (Science Fund Grant No. 01-01-06-SF1197, R.J130000.7923.4S081 and Grant No. 01-01-06-SF1229, R.J130000.7923.4S093).

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Authors and Affiliations

  1. VeCAD Research Laboratory, Faculty of Electrical Engineering, Universiti Teknologi Malaysia, 81310, UTM Johor Bahru, Johor, Malaysia

    Jia Wei Tang, Nasir Shaikh-Husin, Usman Ullah Sheikh & M. N. Marsono

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  1. Jia Wei Tang
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  2. Nasir Shaikh-Husin
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  3. Usman Ullah Sheikh
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  4. M. N. Marsono
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Correspondence to M. N. Marsono.

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Tang, J.W., Shaikh-Husin, N., Sheikh, U.U. et al. A linked list run-length-based single-pass connected component analysis for real-time embedded hardware. J Real-Time Image Proc 15, 197–215 (2018). https://doi.org/10.1007/s11554-016-0590-2

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