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An image-reject down-converter for 802.11a and HIPERLAN2 wireless LANs

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Abstract

An image-reject down-converter for IEEE 802.11a and ETSI HIPERLAN2 wireless local area networks was implemented in a low-cost 46-GHz-f T silicon bipolar process. The circuit integrates a variable-gain low noise amplifier and a double-balanced mixer along with passive image rejection filters. It exhibits a 4-dB noise figure and a power gain of 23 dB. By reducing the low noise amplifier gain by 9 dB (thanks to a 1-bit gain control), the down-converter achieves an input 1-dB compression point of –14 dBm, while drawing only 23 mA from a 3-V supply voltage. The adopted filtering approach provides an image rejection ratio higher than 60 dB.

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References

  1. Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: High speed Physical Layer in the 5 GHz Band, IEEE Std 802.11a-1999, Sep. 1999.

  2. Broadband Radio Access Networks (BRAN); HIPERLAN Type 2; Physical (PHY) layer, ETSI TS 101 475, version 1.3.1, Dec. 2001.

  3. W.J. McFarland, WLAN system trends and the implications for WLAN RFICs, in IEEE Radio Frequency Integrated Circuits Symp Dig., (Jun. 2004) pp. 141–144.

  4. M. Hotti, J. Kaukovuori, J. Ryynänen, K. Kivekäs, J. Jussila, and K. Halonen, A direct conversion RF Front-End for 2-GHz WCDMA and 5.8-GHz WLAN applications, in IEEE Radio Frequency Integrated Circuits Symp. Dig., (Jun. 2003) pp. 45–48.

  5. A.R. Behzad et al., A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard, IEEE J. Solid-State Circuits 38 (Dec. 2003) pp. 2209–2220.

    Article  Google Scholar 

  6. L. Perraud et al., A dual-band 802.11a/b/g radio in 0.18 μm CMOS, in IEEE Int. Solid-State Circuits Conf. Dig., Tech. Papers (Feb. 2004) pp. 94–95.

  7. K. Vavelidis et al., A dual-band 5.15–5.35-GHz, 2.4-2.5-GHz 0.18-μm CMOS transceiver for 802.11a/b/g wireless LAN, IEEE J. Solid-State Circuits 39 (Jul. 2004) pp. 1180–1184.

    Article  Google Scholar 

  8. M. Zannoth, T. Rühlicke, and B.-U. Klepser, A highly integrated dual-band multi-mode wireless LAN transceiver, IEEE J. Solid-State Circuits 39 (Jul. 2004) pp. 1191–1195.

    Article  Google Scholar 

  9. M. Zargari et al., A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems, IEEE J. Solid-State Circuits 37 (Dec. 2002) pp. 1688–1694.

    Article  Google Scholar 

  10. M. Zargari et al., A single-chip dual-band tri-mode CMOS transceiver for IEEE 802.11a/b/g WLAN, in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, (Feb. 2004) pp. 96–97.

  11. H. Samavati, H.R. Rategh, and T.H. Lee, A 5-GHz CMOS wireless LAN receiver front end, IEEE J. Solid-State Circuits 35 (May 2000) pp. 765–771.

    Article  Google Scholar 

  12. T.H. Lee, H. Samavati, and H.R. Rategh, A 5-GHz CMOS wireless LANs, IEEE Trans. Microwave Theory and Tech., 50 (Jan. 2002) pp. 268–280.

    Article  Google Scholar 

  13. J.W.M Rogers and C. Plett, A 5-GHz radio front-end with automatically Q-tuned notch filter and VCO, IEEE J. Solid-State Circuits 38 (Sep. 2003) pp. 1547–1554.

    Article  Google Scholar 

  14. M.A. Copeland, S.P. Voinigescu, D. Marchesan, P. Popescu, and M.C. Malerpard, 5-GHz SiGe HBT monolithic radio transceiver with tunable filtering, IEEE Trans. Microwave Theory and Tech., 48 (Feb. 2000) pp. 170–180.

    Article  Google Scholar 

  15. J.R. Long, A low-voltage 5.1–5.8 GHz image-reject downconverter RF IC, IEEE J. Solid-State Circuits 35 (Sep. 2000) pp. 1320–1328.

    Article  Google Scholar 

  16. J.P. Maligeorgos and J.R. Long A low-voltage 5.1-5.8-GHz image-reject receiver with wide dynamic dange, IEEE J. Solid-State Circuits 35 (Dec. 2000) pp. 1917–1925.

    Article  Google Scholar 

  17. E. Ragonese, A. Italia and G. Palmisano, A 5-GHz monolithic silicon bipolar down-converter with on-chip image filtering, in IEEE Mediterranean Electrotechnical Conference (May 2004) pp. 159–162.

  18. S. Pennisi, S. Scaccianoce, and G. Palmisano, A new design approach for variable-gain low-noise amplifiers, in IEEE Radio Frequency Integrated Circuits Symp. Dig., (Jun. 2000) pp. 139–142.

  19. G. Girlando, and G. Palmisano Noise figure and impedance matching in RF cascode amplifiers, IEEE Trans. Circuits Syst. II 46 (Nov. 1999) pp. 1388–1396.

    Article  Google Scholar 

  20. M. Danesh and J.R. Long Differentially driven symmetric microstrip inductors, IEEE Trans. Microwave Theory Tech., 50 (Jan. 2002) pp. 332–341.

    Article  Google Scholar 

  21. IST-2000-30132 project PERLA. [Online]. Available: http://perla.intranet.gr.

  22. E. Ragonese, A monolithic front-end for 5 GHz WLAN application . [Online]. Available: http://micro.diees.unict.it/courses/micro/seminari/WLAN.pdf.

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Correspondence to Egidio Ragonese.

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Ragonese, E., Italia, A. & Palmisano, G. An image-reject down-converter for 802.11a and HIPERLAN2 wireless LANs. Telecommun Syst 32, 105–115 (2006). https://doi.org/10.1007/s11235-006-9132-8

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  • DOI: https://doi.org/10.1007/s11235-006-9132-8

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