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Impact of interfacial layer using ultra-thin SiO2 on electrical and structural characteristics of Gd2O3 MOS capacitor

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Abstract

The aim of present study is to improve the quality of Gd2O3/p-Si MOS structure by reducing interface trap charge density. Therefore, the ultra-thin SiO2 layer was grown to high-k/Si interface. The effect of the post deposition annealing on the structural properties of the Gd2O3/SiO2 films and electrical characteristics of the Al/Gd2O3/SiO2/p-Si/Al were investigated for three different temperature. Besides, the effect of the series resistance and measurement frequency on the electrical characteristics of the p-MOS capacitors was examined in detail. 118 nm-thick Gd2O3 films were grown by RF magnetron sputtering following the 5 nm-thick SiO2 deposition on p type Si wafer by dry oxidation method. While the Gd2O3 monoclinic characteristic peaks were observed in the Gd2O3/SiO2/Si structures annealed at 600 °C and 800 °C, the XRD spectra of as-deposited and annealed at 400 °C sample pointed out Gd silicate formation. –Si, –O, –Gd, and –H bonds were defined in the FTIR spectra of all samples. The frequency dependent capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of Gd2O3/SiO2 MOS capacitor were measured. Strong accumulation capacitance values in these devices did not change significantly depending on frequency. Unlike from the MOS capacitor with as-deposited and annealed Gd2O3/SiO2 at 400 °C, the interface trap charge density \(({N_{it}})\) increased with increasing voltage frequency for the samples annealed at 600 °C and 800 °C. No significant change in the border trap density \(({N_{bt}})\) with increasing frequency was observed in the MOS capacitor except for as-deposited device. The barrier height \(({\Phi _B})\) increased with increasing frequency for all Gd2O3/SiO2 MOS capacitors.

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Acknowledgements

This work is supported by the Ministry of Development of Turkey under Contract Number: 2016K121110 and Abant Izzet Baysal University under Contract Number AIBU, BAP.2014.03.02.765.

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Authors and Affiliations

  1. Physics Department, Faculty of Arts and Sciences, Uludag University, 16059, Bursa, Turkey

    Aysegul Kahraman

  2. Center for Nuclear Radiation Detector Research and Applications, Abant Izzet Baysal University, 14280, Bolu, Turkey

    Umutcan Gurer, Ramazan Lok, Senol Kaya & Ercan Yilmaz

  3. Physics Department, Faculty of Arts and Sciences, Abant Izzet Baysal University, 14280, Bolu, Turkey

    Ercan Yilmaz

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  1. Aysegul Kahraman
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Correspondence to Aysegul Kahraman.

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Kahraman, A., Gurer, U., Lok, R. et al. Impact of interfacial layer using ultra-thin SiO2 on electrical and structural characteristics of Gd2O3 MOS capacitor. J Mater Sci: Mater Electron 29, 17473–17482 (2018). https://doi.org/10.1007/s10854-018-9847-9

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