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Innovative methodologies of circuit edit by focused ion beam (FIB) on wafer-level chip-scale-package (WLCSP) devices

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Abstract

As packaging technology advances to wafer level chip scale packaging (WLCSP) to enable reduced chip size and manufacturing cost, circuit edit has become a critical issue for the fully packaged integrated circuits (ICs). These advanced package types cannot be rebuilt on a single chip; therefore, function testing after circuit edit of WLCSP faces challenges. Furthermore, there are routings at the redistribution layer of WLCSP ICs. Circuit edit was applied on both the chip and the package level. In this paper the focused ion beam was applied to mill the organic material of the package structure to expose underlying ICs, instead of chemically destroying the packaging. Metal line cutting and conductive path deposition were also developed by a beam-based technique. These new approaches make the direct edit of electrical circuitry possible not only in ICs but also at package level. Therefore, for the debug process and for failure analysis, the WLCSP ICs have negligible damage and negligible signal integrity loss by retaining the original packaging structure.

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Acknowledgments

Special thanks to Ministry of Economic Affairs in Taiwan, ROC, for financially supporting project under project No. 98-EC-17-A-01-I6-0-015 and MaxRise Inc. for providing expertise in WLCSP technology. The author also thanks Chi-Jung Li for technical assistance in discussions.

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Authors and Affiliations

  1. Department of Materials Science and Engineering, National Chiao Tung University, Hsin-chu, 30010, Taiwan, ROC

    Tao-Chi Liu & Chih Chen

  2. Integrated Service Technology Inc., No. 19, Pu-ding Rd, Hsin-chu, 30072, Taiwan, ROC

    Shih-Ting Liu, Ming-Lun Chang & Jandel Lin

Authors
  1. Tao-Chi Liu
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  2. Chih Chen
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  3. Shih-Ting Liu
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  4. Ming-Lun Chang
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  5. Jandel Lin
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Correspondence to Chih Chen.

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Liu, TC., Chen, C., Liu, ST. et al. Innovative methodologies of circuit edit by focused ion beam (FIB) on wafer-level chip-scale-package (WLCSP) devices. J Mater Sci: Mater Electron 22, 1536–1541 (2011). https://doi.org/10.1007/s10854-011-0457-z

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  • DOI: https://doi.org/10.1007/s10854-011-0457-z

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