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High speed low area OBC DA based decimation filter for hearing aids application

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Abstract

This brief presents a decimation filter for hearing aid application using distributed arithmetic (DA) approach. In this paper, we propose a reconfigurable offset-binary code (OBC) DA based finite impulse response (FIR) filter with a shared look-up table (LUT) updating scheme. The size of the LUTs in DA increases exponentially with the order of filters. Shared LUT based DA structure is a solution to reduce this large memory requirement for higher order filters. The proposed shared LUT updating scheme uses LUT partitioning in which coefficients are spilt into small length vectors and it ensures a drastic reduction in the size of LUTs. The proposed DA filter is synthesized on CMOS 90 nm technology using Synapsis ASIC Design Compiler. The proposed design achieves high speed at a reduced area-delay product (ADP) when compared with recent designs. The proposed architecture is implemented and tested on Virtex 5vsx95-1ff1136 FPGA and the results show that the proposed design involves less number of slices and offers high speed than existing designs. A three-stage decimation filter of hearing aids is designed with the proposed FIR filter and is implemented on the target device by Matlab simulink and Xilinx system generator.

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References

  • Chitra, E., Vigneswaran, T., & Malarvizhi, S. (2018). Analysis and implementation of high performance reconfigurable finite impulse response filter using distributed arithmetic. Wireless Personal Communications, 102(4), 3413–3425.

    Article  Google Scholar 

  • Croisier, A., Esteban, D., Levilion, M., & Riso, V. (1973). Digital filter for pcm encoded signals. US Patent 3,777,130

  • Das, J. K. (2010). Low power digital filter implementation in FPGA. Ph.D. thesis

  • Gahlawat, M., Malik, A., & Bansal, P. (2016). Integrating human emotions with spatial speech using optimized selection of acoustic phonetic units. Biologically Inspired Cognitive Architectures, 15, 51–60.

    Article  Google Scholar 

  • Grande, N. J., & Sridevi, S. (2017). Asic implementation of shared lut based distributed arithmetic in fir filter. In 2017 International conference on microelectronic devices, Circuits and Systems (ICMDCS), pp. 1–4. IEEE.

  • Haw-Jing, L. (2009). Design of a reusable distributed arithmetic filter and its application to the affine projection algorithm. Georgia Institute of Technology

  • Hugh, R. (2002). Software radio: A modern approach to radio engineering. Upper Saddle River: Prentice Hall Professional.

    Google Scholar 

  • Killadi, B., & Sriadibhatla, S. (2019). Design and implementation of area and power efficient reconfigurable fir filter with low complexity coefficients. Gazi University Journal of Science, 32(2), 494–507.

    Google Scholar 

  • Kumm, M., Möller, K., & Zipf, P. (2013). Reconfigurable fir filter using distributed arithmetic on fpgas. In Circuits and systems (ISCAS), 2013 IEEE International Symposium on, pp. 2058–2061. IEEE.

  • Kuo, Y. T., Lin, T. J., Li, Y. T., & Liu, C. W. (2010). Design and implementation of low-power ANSI S1. 11 filter bank for digital hearing aids. IEEE Transactions on Circuits and Systems I: Regular Papers, 57(7), 1684–1696.

    Article  MathSciNet  Google Scholar 

  • Levitt, H. (1987). Digital hearing aids: A tutorial review. Journal of Rehabilation Research & Development, 24(4), 7–20.

    Google Scholar 

  • Longa, P., & Miri, A. (2006). Area-efficient FIR filter design on FPGAs using distributed arithmetic. In Signal processing and information technology, 2006 IEEE International Symposium on, pp. 248–252. IEEE.

  • Meher, P. K. (2006). Hardware-efficient systolization of DA-based calculation of finite digital convolution. IEEE Transactions on Circuits and Systems II: Express Briefs, 53(8), 707–711.

    Article  Google Scholar 

  • Meher, P. K., & Park, S. Y. (2011). High-throughput pipelined realization of adaptive FIR filter based on distributed arithmetic. In VLSI and System-on-Chip (VLSI-SoC), 2011 IEEE/IFIP 19th International Conference on, pp. 428–433. IEEE.

  • NagaJyothi, G., & SriDevi, S. (2017). Distributed arithmetic architectures for fir filters-a comparative review. In 2017 International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET), pp. 2684–2690. IEEE.

  • NagaJyothi, G., & Sridevi, S. (2019). High speed and low area decision feed-back equalizer with novel memory less distributed arithmetic filter. Multimedia Tools and Applications pp. 1–15.

  • Ozalevli, E., Huang, W., Hasler, P. E., & Anderson, D. V. (2008). A reconfigurable mixed-signal VLSI implementation of distributed arithmetic used for finite-impulse response filtering. IEEE Transactions on Circuits and Systems I: Regular Papers, 55(2), 510–521.

    Article  MathSciNet  Google Scholar 

  • Park, S. Y., & Meher, P. K. (2014). Efficient FPGA and ASIC realizations of a DA-based reconfigurable fir digital filter. IEEE Transactions on Circuits and Systems II: Express Briefs, 61(7), 511–515.

    Article  Google Scholar 

  • Sriadibhatla, S., & Baboji, K. (2019). Design and implementation of area and power efficient reconfigurable FIR filter with low complexity coefficients. Gazi University Journal of Science, 32(2), 494–507.

    Google Scholar 

  • Synposys. (2012). Design ware buildingblock IP user guide. Mountain View, CA: Synposys, inc.

    Google Scholar 

  • Venugopal, V., Abed, K. H., & Nerurkar, S. B. (2005). Design and implementation of a decimation filter for hearing aid applications. Proceedings of the IEEE SoutheastCon, 2005., pp. 111–115. IEEE.

  • Waelchli, G., Baracchi-Frei, M., Botteron, C., & Farine, P. A. (2010). Distributed arithmetic for efficient base-band processing in real-time GNSS software receivers. Journal of Electrical and Computer Engineering, 2010, 2.

    Article  Google Scholar 

  • White, S. (1986). High-speed distributed-arithmetic realization of a second-order normal-form digital filter. IEEE Transactions on Circuits and Systems, 33(10), 1036–1038.

    Article  Google Scholar 

  • White, S. A. (1989). Applications of distributed arithmetic to digital signal processing: A tutorial review. IEEE ASSP Magazine, 6(3), 4–19.

    Article  Google Scholar 

  • Xilinx. (2010). Logiccore IP FIR compiler v5.0. San Jose, CA: Xilinx,inc.

    Google Scholar 

  • Xin, J., & Qi, Y. (2014). Mathematical modeling and signal processing in speech and hearing sciences (Vol. 10). Cham: Springer.

    MATH  Google Scholar 

  • Yoo, H., & Anderson, D. V. (2005). Hardware-efficient distributed arithmetic architecture for high-order digital filters. In IEEE International Conference on Acoustics, speech, and signal processing, Proceedings (ICASSP’05), vol. 5, pp. v–125.

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  1. VIT University, Vellore, Tamil Nadu, India

    Grande NagaJyothi & Sriadibhatla Sridevi

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  1. Grande NagaJyothi
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  2. Sriadibhatla Sridevi
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Correspondence to Sriadibhatla Sridevi.

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NagaJyothi, G., Sridevi, S. High speed low area OBC DA based decimation filter for hearing aids application. Int J Speech Technol 23, 111–121 (2020). https://doi.org/10.1007/s10772-019-09660-3

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  • DOI: https://doi.org/10.1007/s10772-019-09660-3

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