Abstract
A 1 V low voltage, low power integer-N frequency synthesizer applied for 2.4 GHz wireless sensor network (WSN) applications is presented. The loop parameters of proposed charge pump phase lock loop frequency synthesizer is calculated and verified on the basis of continuous linear model. The proposed voltage controlled oscillator (VCO) consists of a PMOS cross-coupled transistor pair, a NMOS tail current source and a LC resonator. Common-mode 2nd harmonic filters are employed to improve loaded Q factor and suppress noise. LC resonator is optimized and switched capacitor array is used to lower AM–PM noise conversion. Fabricated in TSMC 0.18 μm CMOS process, the measured phase noise of VCO is −113.4 dBc/Hz@1 MHz, and −124.5 dBc/Hz@3.5 MHz while the frequency tuning range covers 4.56–5.32 GHz with 1 V voltage supply. The power dissipation is 2.3 mW and corresponding FOM is about −185 dBc/Hz. With other blocks of dividers, phase frequency detector, charge pump and auto frequency calibration, the die area of the whole fabricated frequency synthesizer is 1.33 mm2 with pads. With 1 V supply voltage and 9.1 mW power consumption, the measured phase noise of the frequency synthesizer is −121.9 dBc/Hz@1 MHz and −134.4 dBc/Hz@3.5 MHz respectively, and the reference spur is −44.5 dBc. The performance of the designed 1 V integer-N frequency synthesizer is suitable for IEEE 802.15.4/ZigBee based 2.4 GHz WSN applications.
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Acknowledgments
This paper is supported by the State Key Development Program for Basic Research of China (Grant No. 2010CB327404). And we are grateful for the encouraging discussions and technique assistances of the whole team in Institute of RF- & OE-ICs, Southeast University.
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Fan, X., Tang, L., Wang, Y. et al. A 1 V 0.18 μm fully integrated integer-N frequency synthesizer for 2.4 GHz wireless sensor network applications. Analog Integr Circ Sig Process 82, 251–264 (2015). https://doi.org/10.1007/s10470-014-0459-x
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DOI: https://doi.org/10.1007/s10470-014-0459-x