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Automatic On-Die Impedance Matching in Current Mode Off-Chip Signaling

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Abstract

A system for on-die automatic impedance matching in current mode off-chip signaling is described. In order to perform the automatic matching operation, an algorithm that integrates the sign of the impedance matching error and the sign of the coupling branch current is implemented. An advantage of the proposed system is that it works without interfering with the driver operation. The transistor level circuit implementation of the system is described and computational simulations with post layout extractions are presented. Also experimental results are shown in order to prove the performance of the system.

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Authors and Affiliations

  1. Electronics Systems Department, Basic Sciences Center, Universidad Autónoma de Aguascalientes, Aguascalientes, Ags., Mexico

    Edgar López-Delgadillo

  2. National Institute for Astrophysics, Optics and Electronics, Tonantzintla, Puebla, Mexico

    Jose A. Díaz-Méndez

  3. Engineering Faculty, Universidad Autónoma de Baja California, Mexicali, Baja California, Mexico

    Miguel A. García-Andrade

  4. ESIME Culhuacan Graduate School, National Polytechnic Institute, Mexico, Mexico

    Rubén Vázquez-Medina

  5. Electronics Department, CUCEI, Universidad de Guadalajara, Guadalajara, Jalisco, Mexico

    Marco A. Gurrola-Navarro

Authors
  1. Edgar López-Delgadillo
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  2. Jose A. Díaz-Méndez
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  3. Miguel A. García-Andrade
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  4. Rubén Vázquez-Medina
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  5. Marco A. Gurrola-Navarro
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Correspondence to Edgar López-Delgadillo.

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López-Delgadillo, E., Díaz-Méndez, J.A., García-Andrade, M.A. et al. Automatic On-Die Impedance Matching in Current Mode Off-Chip Signaling. Circuits Syst Signal Process 33, 3331–3348 (2014). https://doi.org/10.1007/s00034-014-9821-6

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  • DOI: https://doi.org/10.1007/s00034-014-9821-6

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