Abstract
Path expressions were originally proposed by Campbell and Habermann [2] as a mechanism for process synchronization at the monitor level in software. Not surprisingly, they also provide a useful notation for specifying the behavior of asynchronous circuits. Motivated by these potential applications we investigate how to directly translate path expressions into hardware. Our implementation is complicated in the case of multiple path expressions by the need for synchronization on event names that are common to more than one path. Moreover, since events are inherently asynchronous in our model, all of our circuits must be self-timed. Nevertheless, the circuits produced by our construction have are proportional to N · log(N) where N is the total length of the multiple path expression under consideration. This bound holds regardless of the number of individual paths or the degree of synchronization between paths. Furthermore, if the structure of the path expression allows partitioning, the circuit can be laid out in a distributed fashion without additional area overhead.
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References
Anantharaman TA (1985) A delay insensitive regular expression recognizer
Campbell RH, Habermann AN (1974) The specification of process synchronization by path expression. In: Goos G, Hartmanis J (eds) Lecture notes in computer science, vol 16. Springer, pp 89–102
Foster MJ (1984) Specialized silicon compilers for language recognition. PhD Th, CMU July 1984
Foster MJ, Kung HT (1982) Recognize regular languages with programmable building-blocks. J Digital Syst VI(4):323–332
Floyd RW, Ullman JD (1982) The compilation of regular expressions into integrated circuits. J Assoc Comput Mach 29(3):603–622
Hoare CAR (1978) Communicating sequential processes. Commun ACM 21(8):666–677
Lauer PE, Campbell RH (1974) Formal semantics of a class of high-level primitives for coordinating concurrent processes. Acta Inf 5:297–332
Leiserson CE (1981) Area-efficient VLSI computation. PhD Th, Carnegie-Mellon University
Lehman D, Pnueli A, Stavi J (1981) Impartiality, justice and fairness: The ethics of concurrent termination. Automata, Languages and Programming, pp 265–277
Li W, Lauer PE (1984) A VLSI implementation of Cosy. ASM/121, Computing Laboratory, The University of Newcastle Upon Tyne, January, 1984
Milner R (1980) A calculus of communicating systems. Lecturd notes in computer science, vol 92. Springer, Berlin Heidelberg New York
Mukhopadhyay A (1979) Hardware Algorithms for nonnumeric computation. IEEE Trans Comput C-28(6):384–394
Patil S (1975) An asynchronous logic array. MAC TECHNICAL MEMORANDUM 62. Massachusetts Institute of Technology
Pratt VR (1982) On the composition of processes. Symposium on Principles of Programming Languages, ACM January, 1982
Rem M (1983) Partially ordered computations, with applications to VLSI design. Eindhoven University of Technology
Seitz CL (1980) Ideas about arbiters. LAMBDA First Quarter, pp 10–14
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Thomas S. Anantharaman received a B. Tech degree in Electronics Engineering from the Banaras Hindu University, Varanasi (India), in 1982, and has been a graduate student in the computer science department at Carnegie-Mellon University since then.
Edmund M. Clarke, Jr. received a B.A. degree in mathematics from the University of Virginia, Charlottesville, in 1967, an M.A. degree in mathematics from Duke University, Curham N.C., in 1968 and a Ph.D. degree in computer science from Cornell University, Ithaca, NY in 1976. After leaving Cornell, he taught in the department of computer science, Duke University, for two years. In 1978 he moved to Harvard University where he was an assistant professor of computer science in the Division of Applied Sciences for four years. He is currently an associate professor in the computer science department at Carnegie Mellon University. His interests include distributed systems, VLSI design, programming language semantics, and theory of computation. Dr. Clarke is a member of the Association for Computing Machinery, Sigma Xi, Phi Beta Kappa, and is on the editorial board of Distributed Computing.
Michael J. Foster received the B.S. degree in mathematics from the Massachusetts Institute of Technology, Cambridge, in 1973, and the Ph.D. degree in computer science from Carnegie-Mellon University, Pittsburgh, in 1984. From 1973 to 1977 he worked at Tracor-Northern and Princeton Gamma-Tech. Since July 1984 he has been an Assistant Professor of Computer Science at Columbia University, New York City. His research and teaching interests include VLSI design, algorithms, and computer architecture. Foster used to believe that biographies of this type were written by editors who knew all of the researchers in their field, but has now learned to refer to himself in the third person. He is a member of IEEE, ACM, and ΣΞ.
B. Mishra received a B. Tech degree from the Indian Institute of Technology, M.S. and Ph.D. degrees, both from Carnegie-Mellon University. He will be joining New York University in the fall of 1985.
This research was partially supported by NSF Grant MCS-82-16706, and the Defense Advanced Research Projects Agency (DOD), ARPA Order No. 3597, monitored by the Air Force Avionics Laboratory Under Contract F33615-81-K-1539
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Anantharaman, T.S., Clarke, E.M., Foster, M.J. et al. Compiling path expressions into VLSI circuits. Distrib Comput 1, 150–166 (1986). https://doi.org/10.1007/BF01661169
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DOI: https://doi.org/10.1007/BF01661169