Abstract
Cache compression improves the efficiency of a cache by increasing the effective cache size through compression and compaction of data blocks. In this paper, we propose a data compression technique which determines the base value of a cache line dynamically and stores the deltas with respect to this base, the base could be 2 bytes (B2), 4 bytes (B4) or 8 bytes (B8) in size. The dynamic base is chosen such that it maximizes the total number of compressed blocks in a cache line. We implement two types of dynamic base techniques which we call the B2B4 (combines B2 and B4) and B4 techniques. These dynamic base techniques are tested on image workloads and the results are compared against the fixed base compression technique. We see a 52.31% improvement in the number of compressed bytes over the fixed base method on an average, for B2B4 technique, which translates to an average improvement of 3.95% and a maximum improvement of 10.5% in compression factor. We also proposed a cache compaction scheme which utilizes the B2B4 compression technique and finds that such a scheme saves 8.2% of the cache area. We implemented the proposed scheme on an FPGA to analyze the performance and hardware overhead.
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Joshi, S.J., Mata, P., Rao, N. (2020). A Dynamic Base Data Compression Technique for the Last-Level Cache. In: Goel, N., Hasan, S., Kalaichelvi, V. (eds) Modelling, Simulation and Intelligent Computing. MoSICom 2020. Lecture Notes in Electrical Engineering, vol 659. Springer, Singapore. https://doi.org/10.1007/978-981-15-4775-1_17
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DOI: https://doi.org/10.1007/978-981-15-4775-1_17
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