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Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 46))

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Abstract

In many situations it is desirable to have available an inexpensive model for predicting circuit performance, given the values of various statistical parameters in the circuit (e.g., V t for the different devices in the circuit). Examples of such situations are 1) in a circuit optimization loop where quick estimates of yield might be necessary to drive the solution towards a high-yield design in reasonable run time, and 2) during manual design, a simple analytical model can provide insight into circuit operation using metrics such as sensitivities or using quick visualization, thus helping the designer to understand and tune the circuit. Director et al. (IEEE J. Solid-State Circuits 28(3):193–202, 1993) provides a good overview of general statistical design approaches. Even though the paper is not very recent, much of the literature on statistical design (yield optimization) over the last couple of decades proposes techniques that fall under the general types discussed therein. Such performance models in the statistical parameter space are commonly referred to as response surface models: we abbreviate this as RSM in this thesis. Initial approaches employed linear regression to model circuit performance metrics, as in Cox et al. (IEEE Trans. Electron Devices 32(2):471–478, 1985). Soon, the linear models were found to be inadequate for modeling nonlinear behavior and quadratic models were proposed in Yu et al. (IEEE Trans. Computer-Aided Design 6(6):1013–1022, 1987), Feldmann and Director (IEEE Trans. Computer-Aided Design 12(12):1868–1879, 1993) to reduce the modeling error.

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References

  1. P. Cox, P. Yang, S. S. Mahant-Shetti, and P. Chatterjee. Statistical modeling for efficient parametric yield estimation of MOS VLSI circuits. IEEE Trans. Electron Devices, 32(2):471–478, 1985.

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  2. S. W. Director, P. Feldmann, and K. Krishna. Statistical integrated circuit design. IEEE J. Solid-State Circuits, 28(3):193–202, 1993.

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  3. P. Feldmann and S. W. Director. Integrated circuit quality optimization using surface integrals. IEEE Trans. Computer-Aided Design, 12(12):1868–1879, 1993.

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  4. T.-K. Yu, S. M. Kang, I. N. Hajj, and T. N. Trick. Statistical performance modeling and parametric yield estimation of MOS VLSI. IEEE Trans. Computer-Aided Design, 6(6):1013–1022, 1987.

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Correspondence to Amith Singhee .

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© 2009 Springer Science + Business Media B.V.

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Singhee, A., Rutenbar, R.A. (2009). SiLVR: Projection Pursuit for Response Surface Modeling. In: Novel Algorithms for Fast Statistical Analysis of Scaled Circuits. Lecture Notes in Electrical Engineering, vol 46. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-3100-6_1

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  • DOI: https://doi.org/10.1007/978-90-481-3100-6_1

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