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Timed Automata with Integer Resets: Language Inclusion and Expressiveness

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5215))

Abstract

In this paper, we consider a syntactic subset of timed automata called integer reset timed automata (IRTA) where resets are restricted to occur at integral time points. We argue with examples that the notion of global sparse time base used in time triggered architecture and distributed web services can naturally be modelled/specified as IRTA. As our main result, we show that the language inclusion problem \(L(\mathcal A) \subseteq L(\mathcal{B})\) for a timed automaton \(\mathcal A\) and an IRTA \(\mathcal{B}\) is decidable with EXPSPACE complexity. The expressive power and the closure properties of IRTA are also summarized. In particular, the IRTA are (highly succinct but) expressively equivalent to 1-clock deterministic IRTA and they are closed under boolean operations.

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References

  1. Alur, R., Dill, D.L.: A theory of timed automata. Theoretical Computer Science 126(2), 183–235 (1994)

    Article  MATH  MathSciNet  Google Scholar 

  2. Alur, R., Fix, L., Henzinger, T.A.: Event-clock automata: a determinizable class of timed automata. Theoretical Computer Science 211(1–2), 253–273 (1999)

    Article  MATH  MathSciNet  Google Scholar 

  3. Alur, R., Madhusudan, P.: Decision problems for timed automata: A survey. In: 4th Intl. School on Formal Mthods for Computer, Communication, and Software Systems: Real Time (2004)

    Google Scholar 

  4. Bouyer, P., Haddad, S., Reynier, P.-A.: Undecidability results for timed automata with silent transitions. Research Report LSV-07-12, Laboratoire Spécification et Vérification, ENS Cachan, France, 22 pages (February 2007)

    Google Scholar 

  5. Bengtsson, J., Larsen, K., Larsson, F., Pettersson, P., Yi, W.: UPPAAL: A tool suite for automatic verification of real-time systems. In: Hybrid Systems, pp. 232–243 (1995)

    Google Scholar 

  6. Berard, B., Petit, A., Gastin, P., Diekert, V.: Characterization of the expressive power of silent transitions in timed automata. Fundamenta Informaticae 36(2-3), 145–182 (1998)

    MATH  MathSciNet  Google Scholar 

  7. Choffrut, C., Goldwurm, M.: Timed automata with periodic clock constraints. Journal of Automata, Languages and Combinatorics 5(4), 371–404 (2000)

    MATH  MathSciNet  Google Scholar 

  8. Dutertre, B., Sorea, M.: Modeling and verification of a fault-tolerant real-time startup protocol using calendar automata. In: FORMATS/FTRTFT, pp. 199–214 (2004)

    Google Scholar 

  9. D’Souza, D., Tabareau, N.: On timed automata with input-determined guards. In: FORMATS/FTRTFT, pp. 68–83 (2004)

    Google Scholar 

  10. Finkel, O.: Undecidable problems about timed automata. In: Asarin, E., Bouyer, P. (eds.) FORMATS 2006. LNCS, vol. 4202, pp. 187–199. Springer, Heidelberg (2006)

    Chapter  Google Scholar 

  11. Kopetz, H., Bauer, G.: The time-triggered architecture. In: Proceedings of the IEEE, Special Issue on Modeling and Design of Embedded Software (October 2001)

    Google Scholar 

  12. Krcál, P., Mokrushin, L., Thiagarajan, P.S., Yi, W.: Timed vs. time-triggered automata. In: Gardner, P., Yoshida, N. (eds.) CONCUR 2004. LNCS, vol. 3170, pp. 340–354. Springer, Heidelberg (2004)

    Google Scholar 

  13. Kazhamiakin, R., Pandya, P., Pistore, M.: Representation, verification, and computation of timed properties in web. In: ICWS 2006: Proceedings of the IEEE International Conference on Web Services, Washington, DC, USA, pp. 497–504. IEEE Computer Society, Los Alamitos (2006)

    Chapter  Google Scholar 

  14. Mohalik, S., Rajeev, A.C., Dixit, M.G., Ramesh, S., Suman, P.V., Pandya, P.K., Jiang, S.: Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts. In: DAC 2008, Proceedings of Design Automaton Conference, Anaheim, California (2008)

    Google Scholar 

  15. Ouaknine, J., Worrell, J.: On the language inclusion problem for timed automata: Closing a decidability gap. In: LICS 2004: Proceedings of the 19th Annual IEEE Symposium on Logic in Computer Science, Washington, DC, USA, pp. 54–63. IEEE Computer Society, Los Alamitos (2004)

    Chapter  Google Scholar 

  16. Ouaknine, J., Worrell, J.: On the decidability of metric temporal logic. In: LICS 2005: Proceedings of the 20th Annual IEEE Symposium on Logic in Computer Science, Washington, DC, USA, pp. 188–197. IEEE Computer Society, Los Alamitos (2005)

    Google Scholar 

  17. Suman, P.V., Pandya, P.K., Krishna, S.N., Manasa, L.: Determinization of timed automata with integral resets. Research Report TIFR-PPVS-GM-2007/4 (2007), http://www.tcs.tifr.res.in/~vsuman/TechReps/irtav4.pdf

  18. Suman, P.V., Pandya, P.K., Krishna, S.N., Manasa, L.: Timed automata with integer resets: Langauge inclusion and expressiveness. Research Report TIFR-SPKG-GM-2008/1 (2008), http://www.tcs.tifr.res.in/~vsuman/TechReps/IrtaLangInclTechRep.pdf

  19. Tripakis, S.: Folk theorems on the determinization and minimization of timed automata. Inf. Process. Lett. 99(6), 222–226 (2006)

    Article  MathSciNet  Google Scholar 

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Franck Cassez Claude Jard

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Suman, P.V., Pandya, P.K., Krishna, S.N., Manasa, L. (2008). Timed Automata with Integer Resets: Language Inclusion and Expressiveness. In: Cassez, F., Jard, C. (eds) Formal Modeling and Analysis of Timed Systems. FORMATS 2008. Lecture Notes in Computer Science, vol 5215. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85778-5_7

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  • DOI: https://doi.org/10.1007/978-3-540-85778-5_7

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-85777-8

  • Online ISBN: 978-3-540-85778-5

  • eBook Packages: Computer ScienceComputer Science (R0)

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