Summary
Distributed computing attempts to aggregate different computing resources available in enterprises and in the Internet for computation intensive applications in a transparent and scalable way. Digital test generation aims to find minimal set of test vectors to obtain maximum fault coverage for digital electronic circuits. In this paper we focus on distributed environment and parallelization of the computationally intensive genetic algorithm based test generation for sequential circuits. We discuss the concept and implementation of our system infrastructure, task partitioning, allocation, test generation algorithm and results.
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© 2008 Springer-Verlag Berlin Heidelberg
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Ivask, E., Raik, J., Ubar, R. (2008). Distributed Approach for Genetic Test Generation in the Field of Digital Electronics. In: Badica, C., Mangioni, G., Carchiolo, V., Burdescu, D.D. (eds) Intelligent Distributed Computing, Systems and Applications. Studies in Computational Intelligence, vol 162. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85257-5_13
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DOI: https://doi.org/10.1007/978-3-540-85257-5_13
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-85256-8
Online ISBN: 978-3-540-85257-5
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