Abstract
As the pipeline length increases, the accuracy in a branch prediction gets critical to overall performance. In designing a branch predictor, in addition to accuracy, microarchitects should consider power consumption, especially in embedded processors. In this paper, we propose a low power branch predictor, which is based on the gshare predictor, by accessing the BTB (Branch Target Buffer) only when the prediction from the PHT (Prediction History Table) is taken. To enable this, the PHT is accessed one cycle earlier to prevent the additional delay. As a side effect, two predictions from the PHT are obtained at one access to the PHT, which leads to more power reduction. The proposed branch predictor reduces the power consumption, not requiring any additional storage arrays, not incurring additional delay (except just one MUX delay) and never harming accuracy. The simulation results show that the proposed predictor reduces the power consumption by 43-52%.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Parikh, Skadron, K., Zhang, Y., Barcella, M., Stan, M.: Power issues related to branch prediction. In: Proc. Int. Conf. on High-Performance Computer Architecture, pp. 233–242 (2002)
Jimenez, D.A.: Reconsidering complex branch predictors. In: Proc. Int. Conf. on High-Performance Computer Architecture, pp. 43–52 (2003)
Jimenez, D.A., Keckler, S.W., Lin, C.: The impact of delay on the design of branch predictors. In: Proc. Int. Symp. on Microarchitecture, pp. 67–76 (2000)
McFarling, S.: Combining branch predictors, WRL Technical note TN-36, Digital (1993)
Samsung Electronics: Samsung Memory Compiler (2002)
Standard Performance Evaluation Corporation: SPEC CPU 2000 Benchmarks (2000), available at http://www.specbench.org/osg/cpu2000
Lee, C., Potkonjak, M.: W Mangione-Smith.: MediaBench: A Tool for Evaluating Synthesizing Multimedia and Communication Systems. In: Proc. Int. Symp. On Microarchitecture (1997)
ARM Corp., ARM1136J(F)-S, available at http://www.arm.com/products/CPUs/ARM1136JF-S.html
ARM Corp., ARM1156T2(F)-S, available at http://www.arm.com/products/CPUs/ARM1156T2-S.html
Simpelscalar LLC, The Simplescalar Tool Set 3.0 available at http://www.simplescalar.com
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2004 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Chung, S.W., Park, S.B. (2004). A Low Power Branch Predictor to Selectively Access the BTB. In: Yew, PC., Xue, J. (eds) Advances in Computer Systems Architecture. ACSAC 2004. Lecture Notes in Computer Science, vol 3189. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30102-8_32
Download citation
DOI: https://doi.org/10.1007/978-3-540-30102-8_32
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-23003-8
Online ISBN: 978-3-540-30102-8
eBook Packages: Springer Book Archive