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Quantifier Simplification by Unification in SMT

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Frontiers of Combining Systems (FroCoS 2021)

Part of the book series: Lecture Notes in Computer Science ((LNAI,volume 12941))

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Abstract

Quantifier reasoning in SMT solvers relies on instantiation: ground instances are generated heuristically from the quantified formulas until a contradiction is reached at the ground level. Current instantiation heuristics, however, often fail in presence of nested quantifiers. To address this issue we introduce a unification-based method that augments the problem with shallow quantified formulas obtained from assertions with nested quantifiers. These new formulas help unlocking the regular instantiation techniques, but parsimony is necessary since they might also be misguiding. To mitigate this, we identify some effective restricting conditions. The method is implemented in the veriT solver, and tested on benchmarks from the SMT-LIB. It allows the solver to prove more formulas, faster.

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Notes

  1. 1.

    The raw data is available on Zenodo [1].

  2. 2.

    Benchmarks known to be satisfiable can identify soundness problems. Hence, we included them in the experiments, but removed them from the data.

  3. 3.

    Competition website: https://smt-comp.github.io/.

  4. 4.

    Using: -L smt2.6 --no-incremental --no-type-checking --no-interactive

    --full-saturate-quant.

  5. 5.

    Using: -t 180s -m 6000 --mode portfolio --schedule smtcomp --input_syntax smtlib2 -om smtcomp -p off.

  6. 6.

    This has been confirmed to us by the Vampire team in conversations.

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Acknowledgments

We are grateful to Haniel Barbosa, Jasmin Blanchette, Antoine Defourné, Daniel El Ouraoui, Mathias Fleury, Martin Riener, and Athénaïs Vaginay for many fruitful discussions and suggestions to improve the text. We thank the anonymous reviewers for many good suggestions to improve the text. The second author has received funding from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation program (grant agreement No. 713999, Matryoshka). Experiments presented in this paper were carried out using the Grid’5000 testbed, supported by a scientific interest group hosted by Inria and including CNRS, RENATER and several Universities as well as other organizations (see https://www.grid5000.fr).

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Authors and Affiliations

  1. University of Lorraine, CNRS, Inria, and LORIA, Nancy, France

    Pascal Fontaine & Hans-Jörg Schurr

  2. Université de Liège, Liège, Belgium

    Pascal Fontaine

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  1. Pascal Fontaine
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  2. Hans-Jörg Schurr
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Correspondence to Hans-Jörg Schurr .

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Editors and Affiliations

  1. University of Liverpool, Liverpool, UK

    Boris Konev

  2. The University of Manchester, Manchester, UK

    Giles Reger

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Fontaine, P., Schurr, HJ. (2021). Quantifier Simplification by Unification in SMT. In: Konev, B., Reger, G. (eds) Frontiers of Combining Systems. FroCoS 2021. Lecture Notes in Computer Science(), vol 12941. Springer, Cham. https://doi.org/10.1007/978-3-030-86205-3_13

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  • DOI: https://doi.org/10.1007/978-3-030-86205-3_13

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